FAN5033 Datasheet, PDF (8/39 Pages) Fairchild Semiconductor – 8-Bit Programmable, 2- to 3-Phase, Synchronous Buck Controller

Electrical Characteristics (Continued)
V_CC = 12V, FBRTN = GND, and T_A = +25°C. The • denotes specifications that apply over the full operating
temperature range.
Symbol
Parameter
Conditions
Min. Typ. Max. Unit
OD Output
V_OL(ODB) Output Voltage Low
V_OH(ODB) Output Voltage High
Power Good Comparator
V_PWRGD(UV)
Under-Voltage
Threshold
V_PWRGD(OV)
Over-Voltage
Threshold
V_OL(PWRGD) Output Low Voltage
t_PWRGD
Power Good Delay
Time
V_CROWBAR
Crowbar Trip Point
Crowbar Reset Point
I_PWM(SINK) = 400μA
I_PWM(SOURCE) = 400μA
•
160 400 mV
•4
5
V
Relative to Nominal DAC Output
• -300 -250 -200 mV
Relative to Nominal DAC Output
• 100 150 200 mV
I_PWRGD(SINK) = -4mA
•
200 300 mV
C_DELAY = 10nF
Start-up
sequence
•
2
ms
Power Good
Blanking Time
VID code
Changing
•
250
µs
VID Code Static • 100 200
ns
Relative to Nominal DAC Output
• 100 150 200 mV
Relative to FBRTN
• 250 300 350 mV
Over-voltage to
PWM going low
VID code Change • 100 250
µs
t_CROWBAR Crowbar Delay Time
Crowbar Blanking
Time
VID Code Static •
400
ns
PWM Outputs
V_OL(VRTM) Output Voltage Low
I_PWM(SINK) = 400μA
•
160 400 mV
V_OH(VRTM) Output Voltage High
I_PWM(SOURCE) = 400μA
•4
5
V
Phase Disable Voltage
Applicable to PWM3 pins only. Connect
this pin to VCC to disable the phase.⁽³⁾
• VCC -.1
V
Input Supply
V_CC
DC Supply Current
EN = Logic HIGH
•
8
12 mA
V_UVLO UVLO Threshold
V_CC rising
• 6.5 6.9 7.3
V
V_ULVOLHYS UVLO Hysteresis
• 0.7 0.9 1.1
V
Notes:
1. All limits at operating temperature extremes are guaranteed by design, characterization, and statistical quality
control.
2. AC specifications guaranteed by design and characterization; not production tested.
3. To operate FAN5033 with fewer than three phases, PWM3 should be connected to VCC to disable this phase.
See the “Theory of Operation” section for details.
© 2006 Fairchild Semiconductor 2006
FAN5033 Rev. 1.0.0
8 of 39
www.fairchildsemi.com