FAN5033 Datasheet, PDF (3/39 Pages) Fairchild Semiconductor – 8-Bit Programmable, 2- to 3-Phase, Synchronous Buck Controller

Pin Assignment
Figure 2: Pin Assignment
Pin Definitions
Pin #
1
2
3
4
5
6
7
8
9
10
11
12
13
Name
EN
PWRGD
FBRTN
FB
COMP
SS
DELAY
ILIMIT
RT
RAMPADJ
CSREF
CSSUM
CSCOMP
Description
Power Supply Enable Input. Analog comparator input with hysteresis. If input voltage
is higher than the internal threshold, the controller is enabled. If lower, the controller is
disabled.
Power Good Output. Open drain output that pulls to GND when the output voltage is
outside the proper operating range.
Feedback Return. VID DAC and Error Amplifier reference for remote sensing of output
voltage.
Feedback Input. Error amplifier input for remote sensing of output voltage. A positive
internal current source is connected to this pin to allow the output voltage to be offset
lower than the DAC voltage.
Error Amplifier Output. For loop compensation.
Soft-Start Input. An external capacitor connected between this pin and GND sets the
soft-start ramp-up time.
Delay Timer Input. An external capacitor connected between this pin and GND sets the
over-current latch-off delay time, BOOT voltage hold time, EN delay time, and PWRGD
delay time.
Current Limit Set. An external resistor from this pin to GND sets the current limit
threshold of the converter.
Frequency Set Input. An external resistor connected between this pin and GND sets
the oscillator frequency of the device.
PWM Ramp Set Input. An external resistor connected between this pin and the
converter input voltage sets the internal PWM ramp.
Current Sense Amplifier Positive Input. The voltage on this pin is used as the
reference for the current sense amplifier. The Power Good and Crowbar functions are
also internally connected to this pin.
Current Sense Amplifier Negative Input.
Current Sense Amplifier Compensation Output.
© 2006 Fairchild Semiconductor 2006
FAN5033 Rev. 1.0.0
3 of 39
www.fairchildsemi.com