FAN5033 Datasheet, PDF (6/39 Pages) Fairchild Semiconductor – 8-Bit Programmable, 2- to 3-Phase, Synchronous Buck Controller

Electrical Characteristics
V_CC = 12V, FBRTN = GND, and T_A = +25°C. The • denotes specifications that apply over the full operating
temperature range.
Symbol
Parameter
Error Amplifier
V_COMP Output Voltage Range
Accuracy
Relative to nominal DAC output,
V_FB
referenced to FBRTN.
Figure 3
V_FB(BOOT)
Accuracy
Relative to nominal DAC output,
referenced to FBRTN.
Figure 3
Load Line Droop Accuracy
Differential Non-linearity
ΔV_FB Line Regulation
I_FB
Input Bias Current
I_FBRTN FBRTN Current
I_O(ERR)
GBW_(ERR)
Output Current
Gain Bandwidth Product
Slew Rate
V_CSCOMP CSCOMP Voltage Range
t_BOOT BOOT Voltage Hold Time
VID Inputs and VIDSEL
V_IH(VID) Input Low Voltage
V_IL(VID) Input High Voltage
V_IH(VID)
I_IN(VID)
Select VR10 Table
Select VR11 Table
Input Current, VID Low
VID Transition Delay Time
No CPU Detection Turn-off Delay
Time
Oscillator
f_OSC
Frequency
f_PHASE Frequency Variation
V_RT
Output Voltage
V_RAMPADJ RAMPADJ Output Voltage
I_RAMPADJ RAMPADJ Input Current Range
Conditions
VRM11 VID Range:
1.00625V to 1.60000V
Min. Typ. Max. Unit
• 0.5
4.0
V
• -7.7
+7.7 mV
During Start-up
• 1.092 1.100 1.108 V
CSREF-CSCOMP= 80mV
Figure 5
V_CC =10V to 14V
FB forced to V_OUT -3%
COMP = FB⁽²⁾
COMP = FB⁽²⁾
Relative to CSREF
C_DELAY = 10nF
• -78 -80 -82 mV
• -1
+1 LSB
0.05
%
• 13.5 15.0 16.5 µA
•
70
95
µA
500
µA
20
MHz
25
V/µs
• -250
+250 mV
2
ms
VIDx, VIDSEL
VIDx, VIDSEL
VIDSEL Logic Low
VIDSEL Logic High
VID code change to FB
change⁽²⁾
VID code change to OFF
state to PWM going low⁽²⁾
•
0.4
V
• 0.8
3.3
V
0.4
V
0.8
3.3
V
-1
µA
• 200
ns
• 200
ns
• 0.25
T_A = 25C, R_T= 200K, 3-
phase
-20% 400
R_T =100kΩ to GND
• 1.9 2.0
V_RAMPADJ = V_DAC + 2kΩ * (V_CC
– V_DAC) / (R_RAMPADJ + 2KΩ)
•
-50
1
4.50
20%
2.1
+50
50
MHz
kHz
V
mV
µA
© 2006 Fairchild Semiconductor 2006
FAN5033 Rev. 1.0.0
6 of 39
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