English
Language : 

FIN210AC Datasheet, PDF (7/17 Pages) Fairchild Semiconductor – 10-Bit Serializer / Deserializer Supporting Cameras and Small Displays up to 48MHz
Application Diagrams
The following application diagrams illustrate the most typical applications for the FIN210 device. Specific configurations of the
control pins may vary based on the needs of a given system. The following recommendations are valid for all of the
applications shown.
Baseband
Processor
PIXEL CLK
Data[7:0]
HSYNC
VSYNC
/RES
A6
B5
NC C1
FIN210AC
Serializer
VDDP1
VDD
D3
VDDP
E4 F4
VDDS/A
CKREF
STROBE
CKSO+ C5
E5
CKP
CKSO- C6
E6
FIN210AC
Deserializer
VDDP2
E4 F4
D3
VDDS/A VDDP
CKSI+
CKSI-
CKP C1
CKREF A6
STROBE B5
B3:E1
E2
F1
DP[8:1]
DP[9]
DP[10]
VDDP1
F6 DIRI
G3 PLL1
G4
A4
PLL0
G5 CTL_ADJ
G6 S1
S0
GND
DSO+ D6
DSO- D5
CKSI-
CKSI+
E6NC
E5NC
/DIRO B6NC
D5 DSI+
D6 DSI-
NCC6
NCC5
CKSO-
CKSO+
NCB6 /DIRO
B3:E1
DP[8:1] E2
DP[9] F1
DP[10]
/ENZ A4
A3
XTRM F6
DIRI G3
PWS1 G4
PWS0
GND
G5
S1 G6
S0
LCD MODULE
PIXEL CLK
Data[7:0]
HSYNC
VSYNC
/RES
Figure 4. 8-Bit RGB Application (Example Shows BGA 42-Pin Package)
Serializer Configuration:
10MHz to 30MHz Frequency Range (S1=S0=1)
Normal Mode (PLL1=0; PLL0=1)
Deserializer Configuration:
~4 – 5ns output edge rates (S1=S0=1)
~50% CKP PW,(PWS1=PWS0=0)
Baseban d
Processor
MASTER CLK
PIXEL CLK
YUV[7:0]
HSYNC
VSYNC
FIN210AC
Dese rializer
VDDP1
VDD
FIN210AC
Serializer
VDDP2
D3
E4
F4
E4
F4
D3
VDDP VDDS/A
VDDS/A VDDP
A6 CKREF
B5 STROBE
C1
CKP
CKSO+ C5
CKSO- C6
E5 CKSI+
E6 CKSI-
CKP C1
CKREF A6
STROBE B5
B3:E1
E2
F1
A4
F6
G3
G4
A3
G5
G6
DP[8:1]
DP[9]
DP[10]
/ENZ
DIRI
PWS1
PWS0
XTRM
S1
S0
GND
DSI+
DSI-
CKSI-
CKSI+
/DIRO
D5
D6
E6
E5
B6
NC
D6
D5
C6
C5
B6
NC
DSO+
DSO-
CKSO-
CKSO+
/DIRO
DP[8:1]
DP[9]
DP[10]
DIRI
PLL1
PLL0
CTL_ADJ
S1
S0
GND
B3:E1
E2
F1
VDDP2
F6
G3
G4
A4
G5
G6
MASTER CLK
PIXEL CLK
YUV[7:0]
HSYNC
VSYNC
/RES
/RES
Camera Module
Figure 5. 8-Bit YUV 1.3MPixel CMOS Imager (Example Shows BGA 42-Pin Package)
Deserializer Configuration:
~2 – 3ns output edge rates (S1=0, S0=1)
~50% CKP PW,(PWS1=PWS0=0)
Serializer Configuration:
18MHz to 48MHz Frequency Range (S1=0, S0=1)
Normal Mode (PLL1=0, PLL0=1)
© 2009 Fairchild Semiconductor Corporation
FIN210AC • Rev. 1.0.1
7
www.fairchildsemi.com