FIN210AC Datasheet, PDF (13/17 Pages) Fairchild Semiconductor – 10-Bit Serializer / Deserializer Supporting Cameras and Small Displays up to 48MHz

AC Electrical Characteristics (Continued)
Values are provided for over-supply voltage and operating temperature ranges, unless otherwise specified.
Symbol Parameter
Deserializer AC Electrical Characteristics
Data Valid
t_PDV
tRCOL
CKP
DP [1:10]
Data
t_RCOP
Test Conditions
fSTRB=fCKREF
fSTRB=fCKREF
fSTRB=.5x fCKREF
fSTRB=.5x fCKREF
PWS1
0
0
1
1
PWS0
0
1
0
1
tPDV
75%
CKP 50%
t_RCOH
50%
25%
t_RCOL
Data Valid to CKP HIGH (Rising Edge
STROBE), CL=5pF
Setup: DIRI= 0, CKSI and DS are valid signals.
tRFD
Output Rise/Fall Time Data
(20% to 80%)
CL=8pF
S1=0,S0=1
S1=1,S0=0
S1=1,S0=1
tRFC
Output Rise/Fall Time CKP
(20% to 80%)
CL=8pF
S1=0,S0=1
S1=1,S0=0
S1=1,S0=1
Notes:
5. Parameter is characterized, but not production tested.
6. The average bit time “a” is a function of the serializer CKREF frequency; a=(1/f)/12.
Min.
Typ. Max. Unit
6a-3
6a-3
12a-3
16a-3
6a+3
6a+3 ns
12a+3
16a+3
8a-3
8a+3 ns
3
8
ns
5
2
7
ns
4
Logic Timing Controls
Symbol
t PHL_DIR,
tPLH_DIR
tPLZ, tPHZ
Parameter
Test Conditions
Propagation Delay DIRI to /DIRO
DIRI L->H or H->L
Propagation Delay DIRI to DP
DIRI L->H or H->L
Deserializer Disable Time: S0 or S1 LOW to DPTri-State; DIRI=0,
t_DISDES
tDISDES
tDISSER
S1 or S0
DP
Note: If S0(2) is transitioning, S1(1) must =0 for test to be valid.
Serializer Disable Time: S0 or S1 LOW to CKP HIGH
DIRI=1; S1(0) and S0(1)=H->L
Min. Typ. Max. Unit
17 ns
25 ns
25 ns
25 ns
© 2009 Fairchild Semiconductor Corporation
FIN210AC • Rev. 1.0.1
13
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