XRT79L73 Datasheet, PDF (9/71 Pages) Exar Corporation – 3 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC

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PRELIMINARY
3 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC
XRT79L73
REV. P1.0.0
PIN #
NAME
TYPE
GENERAL PURPOSE INPUT AND OUTPUT PINS
DESCRIPTION
U3
DMO1
O Drive Monitor Output Pins:
N26
DMO2
O For each channel, if the DMO output signal is "High", then it means that the drive
W5
DMO3
O ^{monitor circuitry within the XRT79L73 has not detected any bipolar signals at the}
MTIP and MRING inputs (or via the Internal Drive Monitor circuit) within the last
128 ± 32 bit periods. If this output signal is "Low", then it means that bipolar sig-
nals are being detected at the MTIP and MRING input pins of the XRT79L73.
W1
GPIO_0
I/O General Purpose Input/Output Pins:
W2
GPIO_1
Each of these pins can be configured to function as either a general-purpose input
W3
GPIO_2
W4
GPIO_3
or output pin. If a given pin (GPIO_X) is configured to function as an input pin,
then the state of this input pin can be monitored by reading Bit X within the "Oper-
ation General Purpose Pin Data" Register (Address Location = 0x0147).
If a given pin is configured to function as an output pin, then the state of this out-
put pin (GPIO_X) can be controlled by writing the appropriate value into Bit X
within the "Operation General Purpose Pin Data" Register.
Finally, the user can configure a given GPIO_X pin to be an input pin by setting Bit
X, within the "Operation General Purpose Pin Direction Control Register (Address
= 0x014B) to "0". Conversely, the user can configure the GPIO_X pin to be an
output pin by setting Bit X, within the "Operation General Purpose Pin Direction
Control" Register (Address = 0x014B) to "1".
PIN #
NAME
TYPE
DESCRIPTION
TRANSMIT SYSTEM SIDE INTERFACE PINS
AC4
NibbleIntf
I ^{Nibble Interface Select Input pin:}
This input pin permits the user to configure the Transmit Payload Data
Input Interface and the Receive Payload Data Output Interface blocks to
operate in either the "Serial" or the "Nibble-Parallel" Mode.
Setting this input pin "high" configures each of these blocks to operate in
the Nibble-Parallel Mode. In this mode, the "Transmit Payload Data Input
Interface" block will accept the "outbound" payload data (from the
System-Side terminal equipment) in a "nibble-parallel" manner via the
"TxNib[3:0]" input pins. Further, the Receive Payload Data Output
Interface block will output "inbound" payload data (to the System-Side
terminal equipment) in a "nibble-parallel" via the "RxNib[3:0] output pins.
Setting this input pin "low" configures each of these blocks to operate in
the Serial Mode. In this mode, the Transmit Payload Data Input Interface
block will accept the "outbound" payload data (from the System-Side
terminal equipment) in a "serial" manner via the "TxSer" input pin.
Further, the Receive Payload Data Output Interface block will output the
"inbound" payload data (to the System-Side terminal equipment) in a
serial manner, via the "RxSer" output pin.NOTE:
NOTE: This input pin is only active if the XRT79L73 device has been configured to
operate in the Clear-Channel Framer Mode. The user is advised to tie
this input pin to GND if the user intends to configure the XRT79L73
device to operate in the ATM UNI or PPP Modes.
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