XRT79L73 Datasheet, PDF (5/71 Pages) Exar Corporation – 3 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC

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PRELIMINARY
3 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC
XRT79L73
REV. P1.0.0
TRANSMIT PAYLOAD DATA INPUT INTERFACE ........................................................ 55
TRANSMIT PAYLOAD DATA INPUT INTERFACE - TIMING REQUIREMENTS..................................... 55
TABLE 9: TIMING INFORMATION FO RTHE TRNASMIT PAYLOAD DATA INPUT INTERFACE BLOCK .......................................................... 55
FIGURE 11. TIMING DIAGRAM FOR THE TRANSMIT PAYLOAD DATA INPUT INTERFACE WHEN THE XRT79L73 IS OPERATING IN BOTH THE DS3
AND LOOP-TIMING MODES .............................................................................................................................................. 56
FIGURE 12. TIMING DIAGRAM FOR THE TRANSMIT PAYLOAD DATA INPUT INTERFACE WHEN THE XRT79L73 IS OPERATING IN BOTH THE DS3
AND LOCAL-TIMING MODES............................................................................................................................................. 57
FIGURE 13. TIMING DIAGRAM FOR THE TRANSMIT PAYLOAD DATA INPUT INTERFACE WHEN THE XRT79L73 IS OPERATING IN BOTH THE DS3/
NIBBLE-PARALLEL AND LOOP-TIMING MODES .................................................................................................................. 57
FIGURE 14. TIMING DIAGRAM FOR THE TRANSMIT PAYLOAD DATA INPUT INTERFACE WHEN THE XRT79L73 IS OPERATING IN BOTH THE DS3/
NIBBLE-PARALLEL AND LOCAL-TIMING MODES ................................................................................................................. 58
TRANSMIT OVERHEAD DATA INPUT INTERFACE...................................................... 59
TRANSMIT OVERHEAD DATA INPUT INTERFACE - TIMING REQUIREMENTS.................................. 59
TABLE 10: TIMING INFORMATION FOR THE TRANSMIT OVERHEAD DATA INPUT INTERFACE BLOCK ..................................................... 59
FIGURE 15. TIMING DIAGRAM FOR THE TRANSMIT OVERHEAD DATA INPUT INTERFACE (METHOD 1 ACCESS) .................................... 61
FIGURE 16. TIMING DIAGRAM FOR THE TRANSMIT OVERHEAD DATA INPUT INTERFACE (METHOD 2 ACCESS) .................................... 61
RECEIVE PAYLOAD DATA OUTPUT INTERFACE ....................................................... 62
RECEIVE PAYLOAD DATA OUTPUT INTERFACE - TIMING REQUIREMENTS ................................... 62
TABLE 11: TIMING INFORMATION FOR THE RECEIVE PAYLOAD DATA OUTPUT INTERFACE BLOCK ...................................................... 62
FIGURE 17. TIMING DIAGRAM FOR THE RECEIVE PAYLOAD DATA OUTPUT INTERFACE (SERIAL MODE).............................................. 62
FIGURE 18. TIMING DIAGRAM FOR THE RECEIVE PAYLOAD DATA OUTPUT INTERFACE (NIBBLE-PARALLEL MODE) ............................. 63
RECEIVE OVERHEAD DATA OUTPUT INTERFACE .................................................... 64
RECEIVE OVERHEAD DATA OUTPUT INTERFACE - TIMING REQUIREMENTS ................................ 64
AC ELECTRICAL CHARACTERISTICS (CONT.)................................................................................................. 64
FIGURE 19. TIMING DIAGRAM FOR THE RECEIVE OVERHEAD DATA OUTPUT INTERFACE (METHOD 1 - USING RXOHCLK) .................. 65
FIGURE 20. TIMING DIAGRAM FOR THE RECEIVE OVERHEAD DATA OUTPUT INTERFACE (METHOD 2 - USING RXOHENABLE) ............ 65
RECEIVE UTOPIA INTERFACE ...................................................................................... 66
RECEIVE UTOPIA INTERFACE ............................................................................................................... 66
FIGURE 21. TIMING DIAGRAM FOR THE RECEIVE UTOPIA INTERFACE BLOCK .................................................................................. 66
TABLE 12: TIMING INFORMATION FOR THE RECEIVE UTOPIA INTERFACE BLOCK ............................................................................. 66
ORDERING INFORMATION ............................................................................................ 68
PACKAGE DIMENSIONS ................................................................................................ 68
REVISION HISTORY ...................................................................................................................................... 69
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