XRT79L73 Datasheet, PDF (10/71 Pages) Exar Corporation – 3 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC

XRT79L73
REV. P1.0.0
PIN #
U5
N24
V2
NAME
TxFrame1
TxFrame2
TxFrame3
AF1
W25
AF2
TxFrameRef1
TxFrameRef2
TxFrameRef3
U4
TxInClk1
N25
TxInClk2
V1
TxInClk3
PRELIMINARY
ÿþ
3 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC
TYPE
DESCRIPTION
O Transmit End of DS3/E3 Frame Indicator:
O These output pins will pulse "High" for one DS3 or E3 clock period, when the
O ^{Transmit Section of the XRT79L73 is processing the last bit of a given DS3 or E3}
frame. The implications of these output pins, for each mode of operation, are
described below.
ATM UNI/PPP/High-Speed HDLC Controller Mode:
These output pins serve as an end-of-frame indication to the local terminal
equipment.
Clear-Channel Framer Mode:
If the XRT79L73 is configured to operate in the Clear-Channel Framer mode,
then these output pins serve to alert the Local Terminal Equipment that it needs
to begin transmission of a new DS3 or E3 frame. Hence, the Local Terminal
Equipment uses these output signals to maintain Framing Alignment with the
XRT79L73.
I Transmit DS3/E3 Framer - Framing Alignment Input pin:
I If the the Transmit Section of the XRT79L73 is configured to operate in the
I ^{Local-Timing/Frame-Slave Mode, then the Transmit DS3/E3 Framer block will}
use these input signals as the Framing Reference.
When the XRT79L73 is configured to operate in this mode any rising edge at
these input pins will cause the Transmit DS3/E3 Framer block to begin its cre-
ation of a new DS3 or E3 frame. Consequently, the user must supply a clock sig-
nal that is equivalent to the DS3 or E3 frame rates to these input pins. Further, it
is imperative that this clock signal be synchronized with the 44.736MHz or
34.368MHz clock signal applied to the TxInClk input pins.
NOTE: These input pins should be tied to GND if they are not to be used as the
Transmit DS3/E3 Framer - Framing Reference input signals.
I Transmit DS3/E3 Framer Block - Timing Reference Signal:
I If the Transmit Section of the XRT79L73 is configured to operate in the Local-
I ^{Timing Mode, then it will use this signal as the Timing Reference. If the}
XRT79L73 is being operating in the DS3 Mode, then the user is expected to
apply a high-quality 44.736MHz clock signal to these input pins. Likewise, if the
XRT79L73 is being operated in the E3 Mode, then the user is expected to apply
a high-quality 34.368MHz clock signal to these input pins.
A Note for Clear-Channel Framer Operation:
If the user is operating the XRT79L73 device in both the Clear-Channel
Framer and Local-Timing modes, then the user should design or
configure the System-Side terminal equipment circuitry, such that
"outbound" DS3 or E3 data will be output, upon the falling edge of
TxInClk. The Transmit Payload Data Input Interface (within the Transmit
Section of the XRT79L73 device) will sample the data, applied to the
"TxSer" input pin, upon the rising edge of TxInClk.
NOTE: This input pin should be tied to GND if the XRT79L73 device is configured
to operate in the "Loop-Timing" Mode.
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