XRT75L04 Datasheet, PDF (5/57 Pages) Exar Corporation – FOUR CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER

XRT75L04
REV. 1.0.4
FOUR CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
FIGURE 17. INTERFERENCE MARGIN TEST SET UP FOR DS3/STS-1................................................................................................ 31
FIGURE 18. INTERFERENCE MARGIN TEST SET UP FOR E3. ............................................................................................................ 32
TABLE 9: INTERFERENCE MARGIN TEST RESULTS ........................................................................................................................... 32
5.2 CLOCK AND DATA RECOVERY: .................................................................................................................. 32
5.3 B3ZS/HDB3 DECODER: ................................................................................................................................ 32
5.4 LOS (LOSS OF SIGNAL) DETECTOR: ......................................................................................................... 33
5.4.1 DS3/STS-1 LOS CONDITION: .................................................................................................................................... 33
TABLE 10: THE ALOS (ANALOG LOS) DECLARATION AND CLEARANCE THRESHOLDS FOR A GIVEN SETTING OF REQEN (DS3 AND STS-
1 APPLICATIONS) ............................................................................................................................................................ 33
DISABLING ALOS/DLOS DETECTION: .......................................................................................................... 33
5.4.2 E3 LOS CONDITION:.................................................................................................................................................. 33
FIGURE 19. LOSS OF SIGNAL DEFINITION FOR E3 AS PER ITU-T G.775.......................................................................................... 34
FIGURE 20. LOSS OF SIGNAL DEFINITION FOR E3 AS PER ITU-T G.775. ......................................................................................... 34
5.4.3 MUTING THE RECOVERED DATA WITH LOS CONDITION:................................................................................... 35
6.0 JITTER: ................................................................................................................................................ 36
6.1 JITTER TOLERANCE - RECEIVER: .............................................................................................................. 36
FIGURE 21. JITTER TOLERANCE MEASUREMENTS ........................................................................................................................... 36
6.1.1 DS3/STS-1 JITTER TOLERANCE REQUIREMENTS:............................................................................................... 36
FIGURE 22. INPUT JITTER TOLERANCE FOR DS3/STS-1................................................................................................................ 37
6.1.2 E3 JITTER TOLERANCE REQUIREMENTS:............................................................................................................. 37
FIGURE 23. INPUT JITTER TOLERANCE FOR E3 .............................................................................................................................. 37
TABLE 11: JITTER AMPLITUDE VERSUS MODULATION FREQUENCY (JITTER TOLERANCE) .................................................................. 38
6.2 JITTER TRANSFER - RECEIVER/TRANSMITTER: ...................................................................................... 38
TABLE 12: JITTER TRANSFER SPECIFICATION/REFERENCES ............................................................................................................ 38
6.3 JITTER GENERATION: .................................................................................................................................. 38
6.4 JITTER ATTENUATOR: ................................................................................................................................. 38
TABLE 13: JITTER TRANSFER PASS MASKS .................................................................................................................................... 39
FIGURE 24. JITTER TRANSFER REQUIREMENTS AND JITTER ATTENUATOR PERFORMANCE................................................................ 39
7.0 SERIAL HOST INTERFACE: ............................................................................................................... 40
TABLE 14: FUNCTIONS OF SHARED PINS ......................................................................................................................................... 40
TABLE 15: REGISTER MAP AND BIT NAMES .................................................................................................................................... 40
TABLE 16: REGISTER MAP DESCRIPTION - GLOBAL......................................................................................................................... 41
TABLE 17: REGISTER MAP AND BIT NAMES - CHANNEL 0 REGISTERS.............................................................................................. 42
TABLE 18: REGISTER MAP AND BIT NAMES - CHANNEL 1 REGISTERS.............................................................................................. 42
TABLE 19: REGISTER MAP AND BIT NAMES - CHANNEL 2 REGISTERS.............................................................................................. 43
TABLE 20: REGISTER MAP AND BIT NAMES - CHANNEL 3 REGISTERS.............................................................................................. 43
TABLE 21: REGISTER MAP DESCRIPTION ........................................................................................................................................ 44
8.0 DIAGNOSTIC FEATURES: ................................................................................................................. 49
8.1 PRBS GENERATOR AND DETECTOR: ........................................................................................................ 49
FIGURE 25. PRBS MODE ............................................................................................................................................................. 49
8.2 LOOPBACKS: ................................................................................................................................................ 49
8.2.1 ANALOG LOOPBACK:............................................................................................................................................... 49
FIGURE 26. ANALOG LOOPBACK..................................................................................................................................................... 50
8.2.2 DIGITAL LOOPBACK:................................................................................................................................................ 50
FIGURE 27. DIGITAL LOOPBACK...................................................................................................................................................... 50
8.2.3 REMOTE LOOPBACK:............................................................................................................................................... 51
FIGURE 28. REMOTE LOOPBACK .................................................................................................................................................... 51
8.3 TRANSMIT ALL ONES (TAOS): .................................................................................................................... 51
FIGURE 29. TRANSMIT ALL ONES (TAOS)...................................................................................................................................... 51
APPENDIX B .................................................................................................................... 52
TABLE 22: TRANSFORMER RECOMMENDATIONS .................................................................................................................. 52
TABLE 23: TRANSFORMER DETAILS ................................................................................................................................................ 52
ORDERING INFORMATION .................................................................................................................. 54
PACKAGE DIMENSIONS - 176 PIN PACKAGE.................................................................................................. 54
REVISIONS................................................................................................................................................... 55
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