English
Language : 

XRT75L04 Datasheet, PDF (11/57 Pages) Exar Corporation – FOUR CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER
REV. 1.0.4
XRT75L04
FOUR CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
CLOCK INTERFACE
PIN #
SIGNAL NAME
69
E3CLK
67
DS3CLK
65 STS-1CLK/ 12M
156
SFM_EN
57
CLKOUTEN_0
54
CLKOUTEN_1
164
CLKOUTEN_2
167
CLKOUTEN_3
60
CLKOUT_0
63
CLKOUT_1
161
CLKOUT_2
158
CLKOUT_3
TYPE
I
I
I
I
O
O
DESCRIPTION
E3 Clock Input (34.368 MHz ± 20 ppm):
If any of the channels is configured in E3 mode, a reference clock 34.368 MHz
is applied on this pin.
NOTE: In single frequency mode, this reference clock is not required.
DS3 Clock Input (44.736 MHz ± 20 ppm):
If any of the channels is configured in DS3 mode, a reference clock 44.736
MHz. is applied on this pin.
NOTE: In single frequency mode, this reference clock is not required.
STS-1 Clock Input (51.84 MHz ± 20 ppm):
If any of the channels is configured in STS-1 mode, a reference clock 51.84
MHz is applied on this pin..
In Single Frequency Mode, a reference clock of 12.288 MHz ± 20 ppm is con-
nected to this pin and the internal clock synthesizer generates the appropriate
clock frequencies based on the configuration of the channels in E3, DS3 or
STS-1.
Single Frequency Mode Enable:
Tie this pin “High” to enable the Single Frequency Mode. A reference clock of
12.288 MHz ± 20 ppm is applied. This offers the flexibility of using a low cost
reference clock and configures the board for either E3 or DS3 or STS-1 without
the need to change any components on the board.
In the Single Frequency Mode (SFM) an output clock is provided for each chan-
nel if the CLK_EN bit is set thus eliminating the need for a separate clock
source for the framer.
Tie this pin “Low” if single frequency mode is not selected. In this case, the
appropriate reference clocks must be provided.
NOTE: This pin is internally pulled down
Clock output enable for channel 0
Clock output enable for channel 1
Clock output enable for channel 2
Clock output enable for channel 3
Pull this pin “High” to output low jitter clock on the CLKOUT_n pins.
NOTES:
1. This clock output is only available in SFM mode.
2. The maximum drive capability for the clockouts is 16 mA.
Clock output for channel 0
Clock output for channel 1
Clock output for channel 2
Clock output for channel 3
If CLKOUTEN_n pin is “High”, low jitter clock is output for each channel. Fre-
quency of these clocks is based on the mode (E3,DS3 or STS-1) the channels
are configured.
This eliminates the need for a separate clock source for the framer.
NOTES:
1. This clock output is only available in SFM mode.
2. The maximum drive capability for the clockouts is 16 mA.
9