XRT75L04 Datasheet, PDF (43/57 Pages) Exar Corporation – FOUR CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER

REV. 1.0.4
ADDRESS
(HEX)
0x3E
0x3F
XRT75L04
FOUR CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
TABLE 15: REGISTER MAP AND BIT NAMES
PARAMETER
DATA BITS
NAME
7
6
5
4
3
2
1
0
Chip_id
(read only)
Device part number (7:0)
Chip_version
(read only)
Chip revision number (7:0)
TABLE 16: REGISTER MAP DESCRIPTION - GLOBAL
ADDRESS
(HEX)
TYPE
REGISTER
NAME
0x00
R/W APS/Redu
ndancy
SYMBOL
RxON_n
TxON_n
DESCRIPTION
Bit 4 = RxON_0,Bit 5 = RxON_1,Bit 6 = RxON_2 and
Bit 7 = RxON_3
Receiver Turn On. Writing a “1” to the bit field turns
on the Receiver and a “0” turn off the Receiver.
Bit 0 = TxON_0, Bit 1 = TxON_1, Bit 2 = TxON_2 and
Bit 3 = TxON_3
Table below shows the status of the transmitter based
on the bit and pin setting.
DEFAULT
VALUE
0
0
Bit
Pin
Transmitter Status
0
0
OFF
0
1
OFF
1
0
OFF
1
1
ON
0x20
R/W Interrupt
Enable
0x21
Read Interrupt
Only Status
0x22 -
0x2F
0x39 -
0x3D
0x3E
0x3F
Read
Only
Read
Only
Device
Number
Version
Number
INTEN_n Bit 0 = INTEN_0, Bit 1 = INTEN_1, Bit 2 = INTEN_2
0
Bit 3 = INTEN_3.
Writing a “1” to these bits enable the interrupts for the
corresponding channels.
INTST_n Bit 0 = INTST_0, Bit 1 = INTST_1, Bit 2 = INTST_2
0
Bit 3 = INTST_3.
Respective bits are set to “1” if an interrupt service is
required. The respective source level interrupt status
registers are read to determine the cause of interrupt.
Reserved
Reserved
Chip_id This read only register contains device id.
01110100
Chip_version This read only register contains chip version number 00000001
41