XR17C152 Datasheet, PDF (4/62 Pages) Exar Corporation – 5V PCI BUS DUAL UART

XR17C152
5V PCI BUS DUAL UART
Pin Description
NAME
RI0#
PIN #
70
TX1
62
RX1
55
RTS1#
60
CTS1#
56
DTR1#
61
DSR1#
57
CD1#
58
RI1#
59
ANCILLARY SIGNALS
MPIO0-MPIO7
52-45
EECK
84
EECS
83
EEDI
82
EEDO
81
XTAL1
77
XTAL2
76
TMRCK
75
ENIR
74
EN485#
65
áç
REV. 1.2.0
TYPE
DESCRIPTION
I UART channel 0 Ring Indicator or general purpose input (active low). This
input should be connected to VCC when not used.
O UART channel 1 Transmit Data or infrared transmit data. Normal TXD output
idles HIGH while infrared TXD output idles LOW.
I UART channel 1 Receive Data or infrared receive data. Normal RXD input
idles HIGH while infrared RXD input idles LOW. In the infrared mode, the
polarity of the incoming RXD signal can be selected via FCTR bit-4. If this bit
is a logic 0, a LOW on the RXD input is considered a mark and if this bit is a
logic 1, a HIGH on the RXD input is considered a space.
O UART channel 1 Request to Send or general purpose output (active low). If
this output is not used, leave it unconnected.
I UART channel 1 Clear to Send or general purpose input (active low). This
input should be connected to VCC when not used.
O UART channel 1 Data Terminal Ready or general purpose output (active low).
If this output is not used, leave it unconnected.
I UART channel 1 Data Set Ready or general purpose input (active low). This
input should be connected to VCC when not used.
I UART channel 1 Carrier Detect or general purpose input (active low). This
input should be connected to VCC when not used.
I UART channel 1 Ring Indicator or general purpose input (active low). This
input should be connected to VCC when not used.
I/O Multi-purpose inputs/outputs 0-7. The function of these pin are defined thru
the Configuration Register MPIOSEL, MPIOLVL, MPIOINV, MPIO3T and
MPIOINT
O Serial clock to EEPROM. An internal clock of CLK divide by 256 is used for
reading the vendor and sub-vendor ID during power up or reset. However, it
can be manually clocked thru the Configuration Register REGB.
O Chip select to a EEPROM device like 93C46. It is manually selectable thru the
Configuration Register REGB. Requires a pull-up 4.7K ohm resister for exter-
nal sensing of EEPROM during power up. See DAN112 for further details.
O Write data to EEPROM device. It is manually accessible thru the Configura-
tion Register REGB. The 152 auto-configuration register interface logic uses
the 16-bit format.
I Read data from EEPROM device. It is manually accessible thru the Configu-
ration Register REGB.
I Crystal or external clock input of up to 50MHz for data rate of 3.125Mbps at
5V. See AC Characterization table.
O Crystal or buffered clock output.
I 16-bit timer/counter external clock input.
I Global Infrared mode enable (active high). This pin is sampled during power
up, following a hardware reset (RST#) or soft-reset (register RESET). It can
be used to start up both UARTs in the infrared mode. The sampled logic state
is transferred to MCR bit-6 in the UART. Software can override this pin there-
after and enable or disable it.
I Global AutoRS485 half-duplex direction control enable (active low). During
power up or reset, this pin is sampled and if it is a logic high, both UARTs are
set for Auto RS485 Mode. Also, the Auto RS485 bit, FCTR[5], is set in both
channels. Software can override this pin thereafter and enable or disable it.
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