XR16L2750_05 Datasheet, PDF (38/48 Pages) Exar Corporation – 2.25V TO 5.5V DUART WITH 64-BYTE FIFO

XR16L2750
2.25V TO 5.5V DUART WITH 64-BYTE FIFO
xr
REV. 1.2.1
AC ELECTRICAL CHARACTERISTICS
UNLESS OTHERWISE NOTED: TA=0^O TO 70^OC (-40^O TO +85^OC FOR INDUSTRIAL GRADE PACKAGE), VCC=2.25 - 5.5V,
70 PF LOAD WHERE APPLICABLE
SYMBOL
PARAMETER
-
Crystal Frequency
LIMITS
2.5
MIN
MAX
16
LIMITS
3.3
MIN
MAX
LIMITS
5.0
MIN
MAX
20
24
UNIT
MHz
CLK External Clock Low/High Time
20
15
10
ns
OSC External Clock Frequency
24
33
50 MHz
T_AS Address Setup Time
10
10
10
ns
T_AH Address Hold Time
10
10
10
ns
T_CS Chip Select Width
150
75
50
ns
T_RD IOR# Strobe Width
150
75
50
ns
T_DY Read Cycle Delay
150
75
50
ns
T_RDV Data Access Time
135
70
45
ns
T_DD Data Disable Time
0
45
0
30
0
30
ns
T_WR IOW# Strobe Width
150
75
50
ns
T_DY Write Cycle Delay
150
75
50
ns
T_DS Data Setup Time
25
20
15
ns
T_DH Data Hold Time
15
10
10
ns
T_WDO Delay From IOW# To Output
150
75
50
ns
T_MOD Delay To Set Interrupt From MODEM Input
150
75
50
ns
T_RSI Delay To Reset Interrupt From IOR#
150
75
50
ns
T_SSI Delay From Stop To Set Interrupt
1
1
1
Bclk
T_RRI Delay From IOR# To Reset Interrupt
150
75
50
ns
T_SI Delay From Stop To Interrupt
150
75
50
ns
T_INT Delay From Initial INT Reset To Transmit
Start
8
24
8
24
8
24 Bclk
T_WRI Delay From IOW# To Reset Interrupt
150
75
T_SSR Delay From Stop To Set RXRDY#
1
1
T_RR Delay From IOR# To Reset RXRDY#
150
75
T_WT Delay From IOW# To Set TXRDY#
150
75
T_SRT Delay From Center of Start To Reset TXRDY#
8
8
50
ns
1
Bclk
50
ns
50
ns
8
Bclk
38