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XR16L2750_05 Datasheet, PDF (20/48 Pages) Exar Corporation – 2.25V TO 5.5V DUART WITH 64-BYTE FIFO
XR16L2750
2.25V TO 5.5V DUART WITH 64-BYTE FIFO
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REV. 1.2.1
3.0 UART INTERNAL REGISTERS
Each of the UART channel in the 2750 has its own set of configuration registers selected by address lines A0,
A1 and A2 with CSA# or CSB# selecting the channel. The complete register set is shown on Table 7 and
Table 8.
TABLE 7: UART CHANNEL A AND B UART INTERNAL REGISTERS
ADDRESSES
A2 A1 A0
REGISTER
READ/WRITE
COMMENTS
16C550 COMPATIBLE REGISTERS
0 00
RHR - Receive Holding Register
THR - Transmit Holding Register
Read-only
Write-only
LCR[7] = 0
0 00
0 01
DLL - Div Latch Low Byte
DLM - Div Latch High Byte
Read/Write
Read/Write
LCR[7] = 1, LCR ≠ 0xBF
0 00
0 01
DREV - Device Revision Code
DVID - Device Identification Code
Read-only
Read-only
DLL, DLM = 0x00,
LCR[7] = 1, LCR ≠ 0xBF
0 01
IER - Interrupt Enable Register
Read/Write
LCR[7] = 0
0 10
ISR - Interrupt Status Register
FCR - FIFO Control Register
Read-only
Write-only
LCR ≠ 0xBF
0 11
LCR - Line Control Register
Read/Write
1 00
MCR - Modem Control Register
Read/Write
1 01
LSR - Line Status Register
Reserved
Read-only
Write-only
LCR ≠ 0xBF
1 10
MSR - Modem Status Register
Reserved
Read-only
Write-only
1 11
SPR - Scratch Pad Register
Read/Write LCR ≠ 0xBF, FCTR[6] = 0
1 11
1 11
FLVL - RX/TX FIFO Level Counter Register
EMSR - Enhanced Mode Select Register
Read-only
Write-only
LCR ≠ 0xBF, FCTR[6] = 1
ENHANCED REGISTERS
0 00
TRG - RX/TX FIFO Trigger Level Register
FC - RX/TX FIFO Level Counter Register
Write-only
Read-only
0 01
FCTR - Feature Control Register
Read/Write
0 10
1 00
EFR - Enhanced Function Register
Xon-1 - Xon Character 1
Read/Write
Read/Write
LCR = 0xBF
1 01
Xon-2 - Xon Character 2
Read/Write
1 10
Xoff-1 - Xoff Character 1
Read/Write
1 11
Xoff-2 - Xoff Character 2
Read/Write
20