XR16L784_08 Datasheet, PDF (26/51 Pages) Exar Corporation – HIGH PERFORMANCE 2.97V TO 5.5V QUAD UART

XR16L784
HIGH PERFORMANCE 2.97V TO 5.5V QUAD UART
REV. 1.2.3
TABLE 12: UART CHANNEL CONFIGURATION REGISTERS DESCRIPTION. SHADED BITS ARE ENABLED BY EFR BIT-4.
ADDRESS REG READ/
A3-A0 NAME WRITE
BIT-7
BIT-6
BIT-5
BIT-4
BIT-3
BIT-2
BIT-1
BIT-0 COMMENT
0 0 0 0 RHR R
Bit-7 Bit-6 Bit-5 Bit-4 Bit-3 Bit-2 Bit-1 Bit-0 LCR[7]=0
0 0 0 0 THR W
Bit-7 Bit-6 Bit-5 Bit-4 Bit-3 Bit-2 Bit-1 Bit-0 LCR[7]=0
0 0 0 0 DLL R/W Bit-7 Bit-6 Bit-5 Bit-4 Bit-3 Bit-2 Bit-1 Bit-0 LCR[7]=1
0 0 0 1 DLM R/W Bit-7 Bit-6 Bit-5 Bit-4 Bit-3 Bit-2 Bit-1 Bit-0 LCR[7]=1
0 0 0 1 IER R/W
0
0
0
0 Modem RX Line TX RX Data
CTS/
RTS/ Xon/Xoff/
DSR# Int. DTR# Int. Sp. Char.
Enable Enable
Int.
Status Status Empty Int.
Int.
Int.
Int. Enable
Enable Enable Enable
Enable
0 0 1 0 ISR
R FIFOs FIFOs
0
0
INT
INT
INT
INT
Enable Enable
Source Source Source Source
Delta- Xoff/spe- _Bit-3
Bit-2
Bit-1
Bit-0
Flow cial char
Cntl
0 0 1 0 FCR
W RXFIFO RXFIFO TXFIFO TXFIFO DMA TX FIFO RX FIFO FIFOs
Trigger Trigger Trigger Trigger Mode Reset Reset Enable
0 0 1 1 LCR R/W Divisor Set TX Set Par- Even Parity Stop Bits Word Word
Enable Break
ity
Parity Enable
Length Length
Bit-1 Bit-0
0 1 0 0 MCR R/W
0
BRG
Pres-
caler
0
IR
Enable
0 Internal
Lopback
XonAny Enable
OP2²
OP1^{2 RTS# DTR#}
Pin Con- Pin Con-
RTS/
trol
trol
DTR
Flow Sel
0101
LSR
R/W RX FIFO TSR
ERROR Empty
THR
Empty
RX
RX RX Par- RX RX Data
Break Framing ity Error Overrun Ready
Error
0 1 1 0 MSR R
CD
RI
DSR CTS Delta Delta Delta Delta
CD#
RI# ^{DSR# CTS#}
MSR W RS485 RS485 RS485 RS485
0
0
0
0
DLY-3 DLY-2 DLY-1 DLY-0
0 1 1 1 SPR R/W Bit-7 Bit-6 Bit-5 Bit-4 Bit-3 Bit-2 Bit-1 Bit-0 User Data
1 0 0 0 FCTR R/W
TRG
Table
Bit-1
TRG
Table
Bit-0
Auto
RS485
Enable
Invert IR RTS/ RTS/ RTS/ RTS/
RX Input DTR DTR DTR DTR
Hyst Bit- Hyst Bit- Hyst Bit- Hyst Bit-
3
2
1
0
1001
EFR
R/W
Auto
CTS/
DSR
Enable
Auto
RTS/
DTR
Enable
Special
Char
Select
Enable
IER [7:4],
ISR [5:4],
FCR[5:4],
MCR[7:5]
MSR[7:4]
Soft-
ware
Flow
Cntl
Bit-3
Soft-
ware
Flow
Cntl
Bit-2
Soft-
ware
Flow
Cntl
Bit-1
Soft-
ware
Flow
Cntl
Bit-0
1 0 1 0 TXCNT R
Bit-7 Bit-6 Bit-5 Bit-4 Bit-3 Bit-2 Bit-1 Bit-0
1 0 1 0 TXTRG W
Bit-7 Bit-6 Bit-5 Bit-4 Bit-3 Bit-2 Bit-1 Bit-0
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