XRS10L120 Datasheet, PDF (20/52 Pages) Exar Corporation – SERIAL ATA II: 1:2 PORT MULTIPLIER

XRS10L120
PRELIMINARY
SERIAL ATA II: 1:2 PORT MULTIPLIER
REV. P1.0.1
3.2 CMOS Interface
AC and DC specifications for the CMOS inputs and outputs are listed in Table 4. Since all these signals are
asychronous, there are no setup or hold times defined. The CMOS pins are defined in the General Control and
Configuration portion of Table 1 in Section 1, "Pin Descriptions".
TABLE 4: CMOS I/O SPECIFICATIONS
NAME
DESCRIPTION
MIN
NOM
MAX
UNITS
t_DR/t_DF,CMOS CMOS input signal rise/fall times (20% - 80%)
0.2
-
5
ns
t_QR/t_QF,CMOS1 CMOS output signal rise/fall times (20% - 80%)
0.2
-
5
ns
V_IL,CMOS
CMOS input low voltage
-0.3
0
0.36
V
V_IH,CMOS
CMOS input high voltage
0.8
2.5
2.8
V
I_OL,CMOS
dI_OL/dt,_CMOS
L_I,CMOS
C_I,CMOS
Output current for VOL = 0.2V
Output current rate of change
CMOS I/O inductance
CMOS I/O capacitance
4.0
-
-10
-
-
-
-
-
20
mA
10
mA/ns
8
nH
5
pF
.1. This value is measured driving a load of 20pF.
3.3 MDIO Interface
The Management Data Input/Output (MDIO) port complies with Clause 45 of the IEEE 802.3ae specification. A
representative MDIO driver/receiver is shown in Figure 19. MDIO uses an open drain driver with a pullup
resistor to 1.2V.
FIGURE 19. REPRESENTATIVE MDIO CIRCUIT
1.2V
Pin
Open Drain
Driver
To other MDIO Devices
Representative MDIO Read and Write waveforms are shown in Figure 20. The XRS10L120 samples MDIO on
the rising edge of MDC for input and drives MDIO after the rising edge of MDC for output. Note that setup,
hold, and output timings are defined from the maximum vIL and minimum VIH levels.
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