XRS10L120 Datasheet, PDF (15/52 Pages) Exar Corporation – SERIAL ATA II: 1:2 PORT MULTIPLIER

PRELIMINARY
XRS10L120
REV. P1.0.1
SERIAL ATA II: 1:2 PORT MULTIPLIER
2.7.2 Device Side Loopback Modes
The XRS10L120 supports two forms of device-side loopback modes: a shallow serial loopback implemented
within the device-side PHY macros, or a deep parallel loopback implemented within the host PHY macro after
the port multiplier functionality.
SHALLOW DEVICE LOOPBACK MODE
The shallow device loopback mode is shown in Figure 12. In this mode, the incoming data stream from the
device and embedded clock are recovered by an internal CDR, and the deserialized data is retransmitted
serially back to the designated device, as clocked by the recovered clock. In this implementation, the received
data is still transmitted to the internal port multiplier block.
FIGURE 12. SHALLOW DEVICE LOOPBACK MODE
SiT
SiR
PHY Layer
Port Multiplier
Dual PHY
SOT0
SOR0
SOT1
SOR1
DEEP DEVICE LOOPBACK MODE
The deep device loopback mode is shown in Figure 13. In this mode, the incoming data stream from the
device is transmitted through the digital blocks within the XRS10L120, and the loopback path is implemented
at the host-side Serial ATA PHY block. Note that once again, the looped back data is still transmitted on the
host-side output pins.
FIGURE 13. DEEP DEVICE LOOPBACK MODE
SiT
SiR
PHY Layer
Port Multiplier
Dual PHY
SOT0
SOR0
SOT1
SOR1
13