XRT73R12_07 Datasheet, PDF (14/89 Pages) Exar Corporation – TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT

XRT73R12
TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT
MICROPROCESSOR PARALLEL INTERFACE -
REV. 1.0.2
PIN #
SIGNAL NAME
TYPE
DESCRIPTION
K25
Addr0
M22
Addr1
M23
Addr2
M24
Addr3
K26
Addr4
L26
Addr5
M26
Addr6
N26
Addr7
I
An eight bit direct address bus that specifies the source/destination register for
a Read or Write operation.
P22
D0
R26
D1
T26
D2
U26
D3
R25
D4
R24
D5
R23
D6
R22
D7
I/O An eight bit bi-directional data bus that provides the data into the LIU for a Write
operation or the data out to the Host for a Read operation.
P26
INT
O Interrupt Active Output (active low)
Normally, this output pin will be pulled "High". However, if the user enables
interrupts within the LIU, and if those conditions occur, the XRT73R12 will sig-
nal an interrupt from the Microprocessor by pulling this output pin "Low". The
Host Microprocessor must ascertain the source of the interrupt and service it.
Reading the source of the interupt will clear the flag and the INT pin will go back
high unless another interrupt has gone active.
NOTES:
1. This pin will remain "Low" until the Interrupt has been serviced.
2. This pin must be pulled "High" with a 3kΩ ± 1% resistor
N2
RESET
I
RESET Input
Pulsing this input "Low" causes the XRT73R12 to reset the contents of the on-
chip Command Registers to their default values. As a consequence, the
XRT73R12 will then also be operating in its default condition.
For normal operation this input pin should be at a logic "High".
NOTE: This input pin is internally pulled high.
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