XR16C2850 Datasheet, PDF (10/43 Pages) Exar Corporation – 3.3V AND 5V DUART WITH 128-BYTE FIFO

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3.3V AND 5V DUART WITH 128-BYTE FIFO
FIGURE 6. BAUD RATE GENERATOR AND PRESCALER
XR16C2850
REV. 2.0.0
XTAL1
XTAL2
C rystal
Osc/
B u ffe r
P re s ca le r
D ivide by 1
P re s ca le r
D ivide by 4
DLL and DLM
R egisters
M C R Bit-7=0
(d e fa u lt)
Baud Rate
G enerator
L o g ic
M C R Bit-7=1
16X
Sam pling
R ate C lock to
Transm itter
Programming the Baud Rate Generator Registers
DLM and DLL provides the capability of selecting the
operating data rate. Table 5 shows the standard data
rates available with a 14.7456 MHz crystal or external
clock at 16X sampling rate clock rate. A 16X sampling
clock is typically used. However, user can select the
8X sampling clock rate mode to double the operating
data rate. When using a non-standard data rate crys-
tal or external clock, the divisor value can be calculat-
ed for DLL/DLM with the following equation.
divisor (decimal) = (XTAL1 clock frequency / prescaler) / (serial data rate x 16), with CLK8/16 pin = 1
divisor (decimal) = (XTAL1 clock frequency / prescaler) / (serial data rate x 8), with CLK8/16 pin = 0
TABLE 5: TYPICAL DATA RATES WITH A 14.7456 MHZ CRYSTAL OR EXTERNAL CLOCK
OUTPUT Data Rate
MCR Bit-7=1
OUTPUT Data Rate
MCR Bit-7=0
(DEFAULT)
DIVISOR FOR 16x
Clock (Decimal)
DIVISOR FOR 16x
Clock (HEX)
DLM
PROGRAM
VALUE (HEX)
DLL
PROGRAM
VALUE (HEX)
DATA RATE
ERROR (%)
100
400
2304
900
09
00
0
600
2400
384
180
01
80
0
1200
4800
192
C0
00
C0
0
2400
9600
96
60
00
60
0
4800
19.2k
48
30
00
30
0
9600
38.4k
24
18
00
18
0
19.2k
76.8k
12
0C
00
0C
0
38.4k
153.6k
6
06
00
06
0
57.6k
230.4k
4
04
00
04
0
115.2k
460.8k
2
02
00
02
0
230.4k
921.6k
1
01
00
01
0
10