ZADCS146_11 Datasheet, PDF (15/26 Pages) List of Unclassifed Manufacturers – 12-Bit, 200ksps, ADC Family

ZADCS146/147
12-Bit, 200ksps, ADC Family
2.2. Analog Input
The analog input to the converter is fully differential. Both converter input signals IN₊ and IN_– (see Functional
Block diagram at front page) get sampled during the acquisition period enabling the converter to be used in
fully differential applications where both signals can vary over time.
The ZADCS146 /ZADCS147 converters do not require that the negative input signal be kept constant within
± 0.5LSB during the entire conversion as is commonly required by converters featuring pseudo differential
operation only.
The input signals can be applied single ended, referenced to the COM pin, or differential, using pairs of the
input channels. The desired configuration is selectable for every conversion via the Control-Byte received on
DIN pin of the digital interface (see further description below)
A block diagram of the input multiplexer is shown in Figure 6. Table 3 and Table 4 show the relationship of the
Control-Byte bits A2, A1, A0 and SGL/DIF to the configuration of the analog multiplexer.
Both input signals IN₊ and IN_– are generally allowed to swing between –0.2V and VDD+0.2V. However,
depending on the selected conversion mode – uniploar or bipolar – certain input voltage relations can limit the
output code range of the converter.
In unipolar mode the voltage at IN₊ must exceed the voltage at IN_– to obtain codes unequal to 0x00. The
entire 8 bit transfer characteristic is then covered by IN₊ if IN₊ ranges from IN_– to (IN_–+Vref). Any voltage on
IN₊>(IN_–+Vref) results in code 0xFF. Code 0xFF is not reached, if (IN_–+Vref) > VDD + 0.2V because the input
voltage is clamped at VDD + 0.2V by ESD protection devices.
V _IN+
1.5*V _REF
0xFF
V _REF
0.5*V _REF
0V
Code Range
0x00
V _DD -V _REF V _IN-
Figure 4: Input voltage range in unipolar mode
V _CM
V _REF
¾
V
¼ V_REF
0V
-V _REF /2
V_CM Range
0V
+V _REF/2 V _DIFF
Figure 5: Input voltage range for bipolar mode
The voltage at IN_– can range from -0.2V … ½ V_REF without limiting the Code Range, assuming the fore
mentioned VDD condition is true. See also Figure 4 for input voltage ranges in unipolar conversion mode.
Data Sheet
October 12, 2011
© 2011 Zentrum Mikroelektronik Dresden AG — Rev. 2.0
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without
the prior written consent of the copyright owner. The information furnished in this publication is PRELIMINARY and subject to
changes without notice.
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