ZADCS146_11 Datasheet, PDF (14/26 Pages) List of Unclassifed Manufacturers – 12-Bit, 200ksps, ADC Family

ZADCS146/147
12-Bit, 200ksps, ADC Family
2 Detailed Description
2.1. General Operation
The ZADCS14x are classic successive approximation register (SAR) type converters. The architecture is
based on a capacitive charge redistribution DAC merged with a resistor string DAC building a hybrid converter
with excellent monotonicity and DNL properties. The Sample & Hold function is inherent to the capacitive
DAC. This avoids additional active components in the signal path that could distort the input signal or
introduce errors.
Both devices ZADCS146 / ZADCS147 build on the same converter core and differ only in the availability of an
internal reference voltage generator. ZADCS146 is equipped with a highly accurate internal 1.25V bandgap
reference which is available at the VREFADJ pin. The bandgap voltage is further amplified by an internal
buffer amplifier to 2.50V that is available at pin VREF. ZADCS147 comes without the internal reference and
the internal buffer amplifier. It requires an external reference supplied at VREF, with the benefit of
considerably lower power consumption.
A basic application schematic for ZADCS146 is shown in Figure 2, for ZADCS147 in Figure 3. ZADCS146 can
also be operated with an external reference, if VREFADJ is tied to VDD.
µC
µC
ZADCS146
≥ 4.7µF
1 nCS
2 DIN
3 DGND
4 AGND
5 V REF
6 COM
7 CH0
8 CH1
9 CH4
10 CH5
SCLK 20
SSTRB 19
DOUT 18
nSHDN 17
VDD 16
V _REFADJ 15
CH2 14
CH3 13
CH6 12
CH7 11
47nF
Single-ended or differential
analog inputs, 0V … +2.5V
+2.7V to 5.25V
0.1µF 10µF
≥ 4.7µF
ZADCS147
1 nCS
2 DIN
3 DGND
4 AGND
5 V REF
6 COM
7 CH0
8 CH1
9 CH4
10 CH5
SCLK 20
SSTRB 19
DOUT 18
nSHDN 17
VDD 16
n.c. 15
CH2 14
CH3 13
CH6 12
CH7 11
Single-ended or differential
analog inputs, 0V … +V_REF
+2.7V to 5.25V
0.1µF 10µF
Figure 2: Basic application schematic for ZADCS146
Figure 3: Basic application schematic for ZADCS147
A2 A1 A0 CH0 CH1 CH2 CH3 CH4 CH5 CH6 CH7 COM
0 0 0 IN+
IN-
100
IN+
IN-
001
IN+
IN-
101
IN+
IN-
010
IN+
IN-
110
IN+
IN-
011
IN+
IN-
111
IN+ IN-
A2 A1 A0 CH0 CH1 CH2 CH3 CH4 CH5 CH6 CH7
0 0 0 IN+ IN-
001
IN+ IN-
010
IN+ IN-
011
IN+ IN-
1 0 0 IN- IN+
101
IN- IN+
110
IN- IN+
111
IN- IN+
Table 3: Channel selection in Single Ended Mode
Table 4: Channel selection in Differential Mode
Data Sheet
October 12, 2011
© 2011 Zentrum Mikroelektronik Dresden AG — Rev. 2.0
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without
the prior written consent of the copyright owner. The information furnished in this publication is PRELIMINARY and subject to
changes without notice.
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