ZADCS146_11 Datasheet, PDF (11/26 Pages) List of Unclassifed Manufacturers – 12-Bit, 200ksps, ADC Family

ZADCS146/147
12-Bit, 200ksps, ADC Family
1.3.3. Specific Parameters of basic ZADCS147 versions
(VDD = +2.7V to + 5.25V; f_SCLK = 3.2MHz (50% duty cycle); 16 clocks/conversion cycle (200 ksps); _OP = _OPmin … _{OPma x})
Parameter
Symbol Conditions
Min
External Reference at VREF
Typ
VREF Input Voltage Range
1.0
VREF Input Current
VREF Input Resistance
Shutdown VREF Input Current
Capacitive Bypass at VREF
Power Requirements
Positive Supply Voltage
Positive Supply Current
Positive Supply Current
VDD
IDD
IDD
VREF = 2.5V
VDD = 3.6V ^{Operating Mode}
Full Power-Down
VDD = 5.25V ^{Operating Mode}
Full Power-Down
180
11.5 14
4.7
2.7
0.85
0.5
1.00
0.5
Max Unit
VDD +
50mV
V
215 µA
k
0.1
µA
µF
5.25 V
1.0
µA
4.0
1.3
µA
4.0
1.3.4. Digital Pin Parameters
(VDD = +2.7V to + 5.25V; f_SCLK = 3.2MHz (50% duty cycle); 16 clocks/conversion cycle (200 ksps); _OP = _OPmin … _OPmax)
Parameter
Symbol Conditions
Min
Digital Inputs (DIN, SCLK, CS, nSHDN)
Logic High Level
V _IH
VDD = 2.7V
1.9
VDD = 5.25V
3.3
Logic Low Level
V _IL
VDD = 2.7V
VDD = 5.25V
Hysteresis
V _Hyst
0.7
Input Leakage
I _IN
VIN = 0V or VDD
Input Capacitance
C _IN
Digital Outptus (DOUT, SSTRB)
Output High Current
I _OH
V_OH= VDD – 0.5V ^{VDD = 2.7V}
3.5
VDD = 5.25V
5.5
Output Low Voltage
I _OL
V_OL= 0.4V
VDD = 2.7V
4
VDD = 5.25V
6.4
Three-State Leakage Current
I _Leak
nCS = VDD
Three-State Output Capacitance C_OUT
nCS = VDD
Typ
± 0.1
5
± 0.1
5
Max
0.7
1.4
± 1.0
8.5
10.8
11.5
15.3
± 1.0
Unit
V
V
V
V
V
µA
pF
mA
mA
mA
mA
µA
pF
Data Sheet
October 12, 2011
© 2011 Zentrum Mikroelektronik Dresden AG — Rev. 2.0
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without
the prior written consent of the copyright owner. The information furnished in this publication is PRELIMINARY and subject to
changes without notice.
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