TLC156 Datasheet, PDF (34/50 Pages) List of Unclassifed Manufacturers – EPROM/ROM-Based 8-Bit Microcontroller Series

TLC
TLC156
RETIA
Syntax:
Operands:
Operation:
Status Affected:
Description:
Cycles:
Return with Immediate in ACC
RETIA I
0 ≤ I ≤ 255
I à ACC;
Top of Stack à PC
None
The ACC register is loaded with the 8-bit immediate ‘I’. The program counter is loaded from
the top of the stack (the return address). This is a two-cycle instruction.
2
RETURN
Syntax:
Operands:
Operation:
Status Affected:
Description:
Cycles:
Return from Subroutine
RETURN
None
Top of Stack à PC
None
The program counter is loaded from the top of the stack (the return address). This is a
two-cycle instruction.
2
RLR
Syntax:
Operands:
Operation:
Status Affected:
Description:
Cycles:
Rotate Left f through Carry
RLR R, d
0 ≤ R ≤ 63
d ∈ [0,1]
R<7> à C;
R<6:0> à dest<7:1>;
C à dest<0>
C
The contents of register ‘R’are rotated one bit to the left through the Carry Flag. If ‘d’is 0 the
result is placed in the ACC register. If ‘d’is 1 the result is stored back in register ‘R’.
1
RRR
Syntax:
Operands:
Operation:
Status Affected:
Description:
Cycles:
Rotate Right f through Carry
RRR R, d
0 ≤ R ≤ 63
d ∈ [0,1]
C à dest<7>;
R<7:1> à dest<6:0>;
R<0> à C
C
The contents of register ‘R’are rotated one bit to the right through the Carry Flag. If ‘d’is 0
the result is placed in the ACC register. If ‘d’is 1 the result is placed back in register ‘R’.
1
Rev0.95 Nov 20, 2003
P.2/TLC156