TLC156 Datasheet, PDF (21/50 Pages) List of Unclassifed Manufacturers – EPROM/ROM-Based 8-Bit Microcontroller Series

TLC
TLC156
2.6.1 Power-up Reset Timer(PWRT)
The Power-up Reset Timer provides a nominal 18ms delay after Power-on Reset (POR), Brown-out Reset (BOR),
RSTB Reset or WDT time-out Reset. The device is kept in reset state as long as the PWRT is active.
The PWDT delay will vary from device to device due to Vdd, temperature, and process variation.
2.6.2 Oscillator Start-up Timer(OST)
The OST timer provides a 128 oscillator cycle delay (from OSCI input) after the PWRT delay (18ms) is over. This
delay ensures that the X’tal oscillator or resonator has started and stabilized. The device is kept in reset state as
long as the OST is active.
This counter only starts incrementing after the amplitude of the OSCI signal reaches the oscillator input thresholds.
2.6.3 Reset Sequence
When Power-on Reset (POR), Brown-out Reset (BOR), RSTB Reset or WDT time-out Reset is detected, the reset
sequence is as follows:
1. The reset latch is set and the PWRT & OST are cleared.
2. When the internal POR, BOR, RSTB Reset or WDT time-out Reset pulse is finished, then the PWRT begins
counting.
3. After the PWRT time-out, the OST is activated.
4. And after the OST delay is over, the reset latch will be cleared and thus end the on-chip reset signal.
The totally system reset delay time is 18ms plus 128 oscillator cycle time.
FIGURE 2.5: Simplified Block Diagram of on-chip Reset Circuit
WDT
WDT Time-out
Module
RSTB
Vdd
OSCI
Low Voltage _BOR
Detector
(LVD)
Power-on POR
Reset
(POR)
On-Chip
RC OSC
RESET
Power-up
Reset Timer
(PWRT)
S
Q
Reset
Latch
R
Q
CHIP RESET
RESET
Oscillator
Start-up Timer
(OST)
Rev0.95 Nov 20, 2003
P.2/TLC156