TLC156 Datasheet, PDF (26/50 Pages) List of Unclassifed Manufacturers – EPROM/ROM-Based 8-Bit Microcontroller Series

TLC
3.0 INSTRUCTION SET
Mnemonic,
Operands
Description
Operation
BCR
R, bit Clear bit in R
0 à R<b>
BSR
R, bit Set bit in R
1 à R<b>
BTRSC R, bit Test bit in R, Skip if Clear
Skip if R<b> = 0
BTRSS R, bit Test bit in R, Skip if Set
Skip if R<b> = 1
NOP
CLRWDT
OPTION
SLEEP
INT
DAA
DAS
RETURN
RETFIE
CLRA
No Operation
No operation
Clear Watchdog Timer
00h à WDT,
00h à WDT prescaler
Load OPTION register
ACC à OPTION
Go into power-down mode
S/W interrupt
00h à WDT,
00h à WDT prescaler
PC + 1 à Top of Stack,
002h à PC
Adjust ACC’s data format from
HEX to DEC after any addition ACC(hex) à ACC(dec)
operation
Adjust ACC’s data format from
HEX to DEC after any subtraction ACC(hex) à ACC(dec)
operation
Return from subroutine
Top of Stack à PC
Return from interrupt, set GIE bit
Top of Stack à PC,
1 à GIE
Clear ACC
00h à ACC
IOST R Load IOST register
ACC à IOST register
CLRR R Clear R
00h à R
MOVAR R Move ACC to R
MOVR R, d Move R
ACC à R
R à dest
DECR R, d Decrement R
DECRSZ R, d Decrement R, Skip if 0
INCR R, d Increment R
INCRSZ R, d Increment R, Skip if 0
ADDAR R, d Add ACC and R
R - 1 à dest
R - 1 à dest,
Skip if result = 0
R + 1 à dest
R + 1 à dest,
Skip if result = 0
R + ACC à dest
SUBAR R, d Subtract ACC from R
R - ACC à dest
ADCAR R, d Add ACC and R with Carry
R + ACC + C à dest
SBCAR R, d Subtract ACC from R with Carry R + ACC + C à dest
ANDAR R, d AND ACC with R
ACC and R à dest
IORAR R, d Inclusive OR ACC with R
ACC or R à dest
XORAR R, d Exclusive OR ACC with R
R xor ACC à dest
COMR R, d Complement R
RLR
R, d Rotate left f through Carry
R à dest
R<7> à C,
R<6:0> à dest<7:1>,
C à dest<0>
TLC156
Cycles
1
1
1/2 ⁽¹⁾
1/2 ⁽¹⁾
1
1
1
1
3/2 ⁽²⁾
Status
Affected
-
-
-
-
-
TO _, PD
-
TO _, PD
-
1
C
1
2
2
1
1
1
1
1
1
1/2 ⁽¹⁾
1
1/2 ⁽¹⁾
1
1
1
1
1
1
1
1
1
-
-
-
Z
-
Z
-
Z
Z
-
Z
-
C, DC, Z
C, DC, Z
C, DC, Z
C, DC, Z
Z
Z
Z
Z
C
Rev0.95 Nov 20, 2003
P.2/TLC156