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PE3293 Datasheet, PDF (9/18 Pages) List of Unclassifed Manufacturers – 1.8GHz/550MHz Dual Fractional-N Ultra-Low Spurious PLL for Frequency Synthesis
PE3293
Product Specification
Table 8. Register Set
S20
S19
S18
S17
S16
S15
S14
S13
S12
S11
S10
S9
S8
S7
S6
S5
S4
S3
S2
S1
S0
Reserved
Test
PLL2 Synthesizer control
PLL2 Reference counter R2 divide ratio
0
C24
C23
C22
C21
C20
R28
R 27 R 26 R 25 R 24 R 23 R 22 R 21 R 20
Address
0
0
Res.
PLL2 Main counter M2 divide ratio
M28 M27 M26 M25 M24 M23 M22 M21 M20
PLL2 Swallow counter A2
divide ratio
A23
A22
A21
A20
PLL2 Fractional counter F2
numerator value
F24
F23
F22
F21
F20
Address
0
1
Res.
FlexiPower voltage
regulation
PLL1 Synthesizer control
PLL1 Reference counter R1 divide ratio
P2 Res. P1
C14
C13
C12
C11
C10
R18
R17
R16
R15
R14
R13
R12
R11
R10
Address
1
0
PLL1 Main counter M1 divide ratio
M18 M17 M16 M15 M14 M13 M12 M11 M10
PLL1 Swallow counter A1
divide ratio
A14
A13
A12
A11
A10
PLL1 Fractional counter F1
numerator value
F14
F13
F12
F11
F10
Address
1
1
MSB (first in)
Figure 5. Serial Interface Mode Timing Diagram
(last in) LSB
Data
Clock
LE
Data Out
(foLD pin)
tDSU
tDHLD
tClockL
tClockH
tCLE
tLEW
tLEC
tData Out
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