OV6630 Datasheet, PDF (8/29 Pages) List of Unclassifed Manufacturers – SINGLE-CHIP CMOS CIF COLOR DIGITAL CAMERA

PCLK
HREF
Y[7:0]
UV[7:0]
SINGLE IC CMOS COLOR AND B/W DIGITAL CAMERAS
T_CLK
T_SU
T_HD
10
Y
Y
10
80
U
V
80
Repeat for all data bytes
Pixel Data 16-bit Timing
(PCLK rising edge latches data bus)
PCLK
HREF
T_SU
T_CLK
T_HD
Y[7:0]
10
80
10
U
Y
V
Y
80
10
Repeat for all data bytes
Pixel Data 8-bit Timing
(PCLK rising edge latches data bus)
Note: T_CLK is pixel clock period.. T_CLK=112ns for 16-bit output and T_CLK=56ns for 8-bit output if the system
clock is 17.73MHz. T_SU is the setup time of HREF. The maximum is 15ns. T_HD is the hold time of HREF.
The maximum is 15ns.
Figure 4. Pixel Data Bus (YUV Output)
March 4, 2000
Version 1.0
8