M11L416256SA Datasheet, PDF (7/16 Pages) Elite Semiconductor Memory Technology Inc. – 256 K x 16 DRAM EDO PAGE MODE

EliteMT
M11L416256SA
TRUTH TABLE
FUNCTION
Standby
Read : Word
Read : Lower Byte
Read : Upper Byte
Write : Word (Early Write)
Write : Lower Byte (Early)
ADDRESSES
RAS CASL CASH WE OE
DQS
NOTES
ROW COL
H HX HX X X
X
X High-Z
L
L
L
H L ROW COL Data-Out
L
L
H
H L ROW COL _{Lower Byte, Data-Out}
L
H
L
H L ROW COL Upper Byte, Data-Out
L
L
L
L X ROW COL Data-In
L
L
H
L
X
ROW
COL
Lower Byte, Data-In ,
Upper Byte, High-Z
Write : Upper Byte (Early)
L
H
L
L
X
ROW
COL
Lower Byte, High-Z ,
Upper Byte, Data-In
Read-Write
L
L
L H L L H ROW COL Data-Out, Data-In
1, 2
1st Cycle
L H L H L H L ROW COL Data-Out
2
EDO-Page-Mode
Read
2nd Cycle
L
HL HL H L
COL Data-Out
2
Any Cycle
L
LH LH H
L
Data-Out
2
EDO-Page-Mode ^{1st Cycle}
L H L H L L X ROW COL Data-In
1
Write
2nd Cycle
L
HL HL L
X
COL Data-In
1
EDO-Page-Mode ^{1st Cycle}
L H L H L H L L H ROW COL Data-Out, Data-In
1, 2
Read-Write
2nd Cycle
L
HL HL HLLH
COL Data-Out, Data-In
1, 2
Hidden Refresh
LHL L
L
H L ROW COL Data-Out
2
RAS -Only Refresh
L
H
H
X X ROW
High-Z
CBR Refresh
HL L
L
HX
X
X High-Z
3
Self-Refresh
HL L
L
HX
X
X High-Z
3
*Note : 1. These WRITE cycles may also be BYTE WRITE cycles (either CASL or CASH active).
2. These READ cycles may also be BYTE READ cycles (either CASL or CASH active).
3. Only one CAS must be active ( CASL or CASH ).
Elite Memory Technology Inc
Publication Date: Aug. 2005
Revision : 1.4
7/16