M13S2561616A-2S Datasheet, PDF(48/49 Page) Elite Semiconductor Memory Technology Inc. – Double-data-rate architecture, two data transfers per clock cycle

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M13S2561616A-2S Datasheet, PDF (48/49 Pages) Elite Semiconductor Memory Technology Inc. – Double-data-rate architecture, two data transfers per clock cycle

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ESMT

Revision History

Revision

1.0

Date

2015.01.12

M13S2561616A (2S)

Operation Temperature Condition -40Â°C~85Â°C

Original

Description

Elite Semiconductor Memory Technology Inc.

Publication Date : Jan. 2015

Revision : 1.0

48/49

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