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SED1565 Datasheet, PDF (73/87 Pages) Epson Company – Direct display of RAM data through the display data RAM
SED1565 Series
• The Relationship Between Oscillator Frequency fOSC, Display Clock Frequency fCL and the Liquid Crystal Frame
Rate Frequency fFR
Table 25
Item
SED1565*** When the internal oscillator circuit is used
When the internal oscillator circuit is not used
fCL
_fO_S_C_
4
External input (fCL)
SED1566*** When the internal oscillator circuit is used
When the internal oscillator circuit is not used
_fO_S_C_
8
External input (fCL)
SED1567*** When the internal oscillator circuit is used
When the internal oscillator circuit is not used
_fO_S_C_
8
External input (fCL)
SED1568*** When the internal oscillator circuit is used
When the internal oscillator circuit is not used
_fO_S_C_
8
External input (fCL)
SED1569*** When the internal oscillator circuit is used
When the internal oscillator circuit is not used
_fO_S_C_
8
External input (fCL)
(fFR is the liquid crystal alternating current period, and not the FR signal period.)
fFR
_f_O_S_C_
4 × 65
_f_C_L_
260
_f_O_S_C_
8 × 49
_f_C_L_
196
_f_O_S_C_
8 × 33
_f_C_L_
264
_f_O_S_C_
8 × 55
_f_C_L_
220
_f_O_S_C_
8 × 53
_f_C_L_
212
References for items market with *
*1 While a broad range of operating voltages is guaranteed, performance cannot be guaranteed if there are
sudden fluctuations to the voltage while the MPU is being accessed.
*2 The operating voltage range for the VDD system and the V5 system is as shown in Figure 33. This applies
when the external power supply is being used.
*3 The A0, D0 to D5, D6 (SCL), D7 (SI), RD (E), WR (R/W), CS1, CS2, CLS, CL, FR, M/S, C86, P/S, DOF,
RES, IRS, and HPM terminals.
*4 The D0 to D7, FR, FRS, DOF, and CL terminals.
*5 The A0, RD (E), WR (R/W), CS1, CS2, CLS, M/S, C86, P/S, RES, IRS, and HPM terminals.
*6 Applies when the D0 to D5, D6 (SCL), D7 (SI), CL, FR, and DOF terminals are in a high impedance state.
*7 These are the resistance values for when a 0.1 V voltage is applied between the output terminal SEGn or
COMn and the various power supply terminals (V1, V2, V3, and V4). These are specified for the operating
voltage (3) range.
RON = 0.1 V/∆ I (Where ∆ I is the current that flows when 0.1 V is applied while the power supply is ON.)
*8 See Table 9-7 for the relationship between the oscillator frequency and the frame rate frequency.
*9 The V5 voltage regulator circuit regulates within the operating voltage range of the voltage follower.
*10 This is the internal voltage reference supply for the V5 voltage regulator circuit. In the SED1565 Series
chips, the temperature range can come in three types as VREG options: (1) approximately –0.05%/°C, (2) –
0.2%/°C, and (3) external input.
*11, 12 It indicates the current consumed on ICs alone when the internal oscillator circuit and display are turned
on.
The SED1565 is 1/9 biased, SED1566 is 1/8 biased and SED1567 is 1/6 biased.
Does not include the current due to the LCD panel capacity and wiring capacity.
Applicable only when there is no access from the MPU.
*12 It is the value on a model having the VREG option temperature gradient is –0.05%/°C when the V5 voltage
regulator internal resistor is used.
EPSON
8–71