SED1565 Datasheet, PDF (34/87 Pages) Epson Company – Direct display of RAM data through the display data RAM

SED1565 Series
The Power Supply Circuits
The power supply circuits are low-power consumption
power supply circuits that generate the voltage levels
required for the liquid crystal drivers. They comprise
Booster circuits, voltage regulator circuits, and voltage
follower circuits. They are only enabled in master
operation.
The power supply circuits can turn the Booster circuits,
the voltage regulator circuits, and the voltage follower
circuits ON of OFF independently through the use of the
Power Control Set command. Consequently, it is possible
to make an external power supply and the internal
power supply function somewhat in parallel. Table 7
shows the Power Control Set Command 3-bit data
control function, and Table 8 shows reference
combinations.
Table 7 The Control Details of Each Bit of the Power Control Set Command
Item
Status
“1” “0”
D2 Booster circuit control bit
D1 Voltage regulator circuit (V regulator circuit) control bit
D0 Voltage follower circuit (V/F circuit) control bit
ON OFF
ON OFF
ON OFF
Table 8 Reference Combinations
Use Settings
D2
D1
D0
Step-up
circuit
V
regulator
circuit
V/F
circuit
External
voltage
input
Step-up
voltage
system
terminal
1 Only the internal power supply is 1 1 1
O
O
O
VSS2
Used
used
2 Only the V regulator circuit and 0 1 1
X
O
O VOUT, VSS2 Open
the V/F circuit are used
3 _{Only the V/F circuit is used}
001
X
X
O
V5, VSS2 Open
4 Only the external power supply is 0 0 0
X
X
X
V1 to V5 Open
used
* The “step-up system terminals” refer CAP1+, CAP1–, CAP2+, CAP2–, and CAP3–.
* While other combinations, not shown above, are also possible, these combinations are not recommended
because they have no practical use.
The Step-up Voltage Circuits
Using the step-up voltage circuits equipped within the
SED1565 Series chips it is possible to product a Quad
step-up, a Triple step-up, and a Double step-up of the
VDD – VSS2 voltage levels.
Quad step-up: Connect capacitor C1 between CAP1+
and CAP1–, between CAP2+ and CAP2–,
between CAP1+ and CAP3–, and between
VSS2 and VOUT, to produce a voltage level
in the negative direction at the VOUT
terminal that is 4 times the voltage level
between VDD and VSS2.
Triple step-up: Connect capacitor C1 between CAP1+
and CAP1–, between CAP2+ and CAP2–
and between VSS2 and VOUT, and short
between CAP3– and VOUT to produce a
voltage level in the negative direction at the
VOUT terminal that is 3 times the voltage
difference between VDD and VSS2.
Double step-up:
Connect capacitor C1 between
CAP1+ and CAP1–, and between VSS2 and
VOUT, leave CAP2+ open, and short
between CAP2–, CAP3– and VOUT to
produce a voltage in the negative direction
at the VOUT terminal that is twice the voltage
between VDD and VSS2.
The step-up voltage relationships are shown in Figure 7.
8–32
EPSON