EPC901 Datasheet, PDF (4/37 Pages) Espros Photonics corp – CCD line sensor 1024x1 pixel

2. Pin-out
2.1. Pin assignment
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epc901
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Figure 4: Pin-out of epc901 with view to the photo-sensitive side (top-view)
2.2. Pin table
Pin no. Pin name
Digital pins
2 PWR_DOWN
3 CLR_DATA
5 CLR_PIX
6 SHUTTER
12 READ
4 DATA_RDY
13 SDA
14 SCL
15 ROI_SEL
17 CS1
19 CS0
21 GAIN
22 BW0
23 BW1
24 RD_DIR
25 HOR_BIN
30 TEST_MODE
Analog pins
8 VIDEO_N
9 VIDEO_P
11 VIDEO_CM
27 I_BIAS
28 ANA_TEST_1
29 ANA_TEST_0
Supply pins
26 VDD
10 VDD_OA
32 VDD_1V8
18 VDD_5V0
20 VDD_7V0
16 AGND
1 AGND
7 GND_OA
31 DGND
Pin type Default [V] Description
DI
DI
DI
DI
DI
DO
DIOD
DIOD
DI
TER
TER
TER
TER
TER
DI
TER
DI
0
0
0
0
0
VDD
VDD
0
VDD/2
VDD/2
VDD/2
VDD/2
VDD/2
0
VDD/2
0
Power-down mode enable
Clear internal data memory controller
Rising edge resets pixels and its controller
Exposure active when SHUTTER set
Read-out control and read clock
Flag when data on video interface is ready. Used as a strap pin to turn on/off
the charge pump
I2C serial data (open drain)
I2C serial clock (open drain)
Region of interest selection
I2C chip select 1
I2C chip select 0
Select gain of read-out path
LSB of bandwidth of video amplifier
MSB of bandwidth of video amplifier
Read-out direction
Horizontal binning selection
Chip test
AO
Negative terminal of video output
AO
Positive terminal of video output
AI
VDD/2 or 0 Voltage to set video output common-mode
AI
Bias current
AIO
0
Analog test in-/output 1
AIO
0
Analog test in-/output 0
Supply
Supply
AO / Supply
AO / Supply
AO / Supply
Supply
Supply
Supply
Supply
Positive chip supply voltage
Positive supply of video amplifier
Decoupling of digital partition
Decoupling of CCD bias voltage, input is supplied externally (refer to 12.2.)
Decoupling of charge pump
Analog ground
Analog ground
Video amplifier ground
Digital ground
Definitions:
■ DI:
■ DO:
■ DIOD:
■ AO:
■ AI:
■ AIO:
■ TER:
Digital input pin, with an internal pull-down resistor of approx. 100-250kΩ
Digital output pin
General purpose bidirectional digital pin with open-drain output, requires external pull-up resistor
Analog output
Analog input
Analog input and output
Ternary input pin, with a pull-down and an equal pull-up resistor of approx. 100-250kΩ which tie the pin to the VDD/2 state.
© 2016 ESPROS Photonics Corporation
Characteristics subject to change without notice
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Datasheet_epc901-V5.6
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