EPC901 Datasheet, PDF (16/37 Pages) Espros Photonics corp – CCD line sensor 1024x1 pixel

6. Temperature sensor
There are two temperature sensors on the IC, one on each side of the pixel array. They are turned off by default and can be turned on
through I2C (see Table 18). The temperature sensors just provide raw values which are off by an offset (OFFSET ) TEMP and a gain (GAIN-
) TEMP from the measured absolute temperature value. Thus calibration is mandatory to enable absolute temperature measurements. Calib -
ration can take place during manufacturing of the system by applying one or two reference temperature/s and storing the calibration value
in a non-volatile memory e.g. in the µC.
The digitized output of the temperature sensors can be read through the I2C interface registers TEMP_SENSE* (refer to Table 15 … Table
18). As soon as one of these addresses is read, the update of these registers with new temperature values is blocked until all four registers
are read. The sequence in which these registers are read, is not important.
7. Power-down mode
The chip can be forced into power-down mode to reduce the power consumption.
PWR_DOWN
L
H
Description
Operation
Power-down mode activated
If the chip is forced to power-down while frames are still stored on the IC, these frames are lost with power-down. When PWR_DOWN is
asserted during an acquisition or transmission, the current operation is finished before the chip goes to power-down. When the power-
down mode is de-activated, the IC typically needs TPWR_UP to be back in functional mode. When PWR_DOWN goes to low state, the pixel
array is it automatically flushed. In the power-down mode, no charge is collected by the CCD.
8. Chip reset
The digital control unit of the epc901 IC can be reset by the following mechanisms:
■ Disconnecting and reconnecting the power supply
■ Reset command through I2C (software reset)
9. Measuring the internal oscillator clock frequency
The epc901 chip has an internal oscillator which controls the operation of the chip. The typical frequency is approx. 35MHz but it has a
significant tolerance (refer to chapter 3.5, Timing parameters), as well as a temperature drift. To measure this frequency in order to apply
an optimized timing, the following procedure can be used:
1. Apply CLR_DATA
2. Apply SHUTTER for longer than TFLUSH, e.g. 1µs
3. Measure the time from the falling edge of SHUTTER until the rising edge of DATA_RDY (TSHIFT)
CLR_DATA
SHUTTER
T
PULSE,CLR_DATA
DATA_RDY
T
SHUTTER
T
MEAS
Figure 11: Sequence to measure internal clock frequency
Since TSHIFT needs 24 to 26 clock cycles (n * ClockCycles), the frequency of the internal oscillator can be calculated according to the
following formula:
F
OSC ⁼
n∗ClockCycles
T _MEAS
E.g. if the measured time is 600ns, the oscillator frequency is between 40 and 43.3MHz. If the clock frequency shall be acquired more
accurate, multiple measurements of TMEAS shall be acquired and the average of these samples shall be used in the above formula. The
clock frequency can be trimmed by setting a configuration register according to the description in Table 11 and 12.
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Characteristics subject to change without notice
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Datasheet_epc901-V5.6
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