HB52F168GB-B Datasheet, PDF (6/19 Pages) Elpida Memory – 128 MB Unbuffered SDRAM Micro DIMM 16-Mword × 64-bit, 133/100 MHz Memory Bus, 1-Bank Module (4 pcs of 16 M × 16 components) PC133/100 SDRAM

HB52F168GB-B, HB52D168GB-B
Byte No. Function described
Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 Hex value Comments
20
SDRAM device attributes:
0 0 0 0 0 0 0 1 01
0
W latency
21
SDRAM module attributes
0 0 0 0 0 0 0 0 00
Unbuffer
22
SDRAM device attributes:
0 0 0 0 1 1 1 0 0E
General
V_CC ± 10%
23
SDRAM cycle time
1 0 1 0 0 0 0 0 A0
(2nd highest CE latency)
(-75/A6) 10 ns
CL = 2
(-B6) 15 ns
1 1 1 1 0 0 0 0 F0
24
SDRAM access from Clock 0 1 1 0 0 0 0 0 60
(2nd highest CE latency)
(-75/A6) 6 ns
(-B6) 8 ns
1 0 0 0 0 0 0 0 80
25
SDRAM cycle time
0 0 0 0 0 0 0 0 00
(3rd highest CE latency)
Undefined
26
SDRAM access from Clock 0 0 0 0 0 0 0 0 00
(3rd highest CE latency)
Undefined
27
Minimum row precharge time 0 0 0 1 0 1 0 0 14
20 ns
28
Row active to row active min 0 0 0 0 1 1 1 1 0F
(-75)
15 ns
(-A6/B6)
0 0 0 1 0 1 0 0 14
20 ns
29
RE to CE delay min
0 0 0 1 0 1 0 0 14
20 ns
30
Minimum RE pulse width
0 0 1 0 1 1 0 1 2D
(-75)
45 ns
(-A6/B6)
0 0 1 1 0 0 1 0 32
50 ns
31
Density of each bank on
0 0 1 0 0 0 0 0 20
module
128M byte
32
Address and command signal 0 0 0 1 0 1 0 1 15
input setup time
(-75)
1.5 ns
(-A6/B6)
0 0 1 0 0 0 0 0 20
2.0 ns
33
Address and command signal 0 0 0 0 1 0 0 0 08
input hold time
(-75)
0.8 ns
(-A6/B6)
0 0 0 1 0 0 0 0 10
1.0 ns
34
Data signal input setup time 0 0 0 1 0 1 0 1 15
(-75)
1.5 ns
(-A6/B6)
0 0 1 0 0 0 0 0 20
2.0 ns
Data Sheet E0008H10
6