E1729E30 Datasheet, PDF (24/33 Pages) Elpida Memory – 1G bits DDR3 SDRAM

EDJ1108DJBG, EDJ1116DJBG
Table 20: DDR3-1333 Speed Bins
Speed Bin
CL-tRCD-tRP
Symbol
/CAS write latency
tAA
tRCD
tRP
tRC
tRAS
tCK(avg) @CL=5
CWL = 5
CWL = 6, 7
tCK(avg) @CL=6
CWL = 5
CWL = 6
CWL = 7
tCK(avg) @CL=7
CWL = 5
CWL = 6
CWL = 7
tCK(avg) @CL=8
CWL = 5
CWL = 6
CWL = 7
tCK(avg) @CL=9
CWL = 5, 6
CWL= 7
tCK(avg) @CL=10
CWL = 5, 6
CWL= 7
Supported CL settings
Supported CWL settings
DDR3-1333H
9-9-9
min
max
13.5
20
(13.125)
13.5
(13.125)
⎯
13.5
⎯
(13.125)
49.5
(49.125)
⎯
36
9 × tREFI
3.0
3.3
Reserved
Reserved
2.5
3.3
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
1.875
< 2.5
Reserved
Reserved
Reserved
Reserved
1.875
< 2.5
Reserved
Reserved
Reserved
Reserved
1.5
< 1.875
Reserved
Reserved
1.5
< 1.875
5, 6, 7, 8, 9, 10
5, 6, 7
Unit
Notes
ns
11
ns
11
ns
11
ns
11
ns
10
ns
1, 2, 3, 4, 6, 12
ns
4
ns
1, 2, 3, 6
ns
4
ns
4
ns
4
ns
1, 2, 3, 4, 6
ns
4
ns
4
ns
1, 2, 3, 6
ns
4
ns
4
ns
1, 2, 3, 4
ns
4
ns
1, 2, 3
nCK
nCK
Data Sheet E1729E30 (Ver. 3.0)
24