|
E1729E30 Datasheet, PDF (13/33 Pages) Elpida Memory – 1G bits DDR3 SDRAM | |||
|
◁ |
EDJ1108DJBG, EDJ1116DJBG
Table 6: IDD0 Measurement-Loop Pattern
CK,
Sub Cycle Com-
A11
A7 A3 A0
/CK
CKE -Loop number mand /CS /RAS /CAS /WE ODT BA*3 -Am A10 -A9 -A6 -A2
0
ACT 0
0
1
1
0
0
0
0
0 00
1, 2
D, D 1
0
0
0
0
0
0
0
0 00
3, 4
/D, /D 1
1
1
1
0
0
0
0
0 00
â¦
Repeat pattern 1â¦4 until nRAS â 1, truncate if necessary
nRAS PRE 0
0
1
0
0
0
0
0
0 00
â¦
Repeat pattern 1...4 until nRC â 1, truncate if necessary
1 Ã nRC ACT 0
0
1
1
0
0
0
0
0 F0
0
+0
1 Ã nRC
D, D 1
0
0
0
0
0
0
0
0 F0
+1, 2
Toggling Static H
1 Ã nRC
+ 3, 4
â¦
/D, /D 1
1
1
1
0
0
0
0
0 F0
Repeat pattern nRC + 1,...,4 until 1 Ã nRC + nRAS â 1, truncate if necessary
1 Ã nRC PRE 0
0
1
0
0
0
0
0
0 F0
+ nRAS
â¦
Repeat nRC + 1,...,4 until 2 Ã nRC â 1, truncate if necessary
1
2 Ã nRC Repeat Sub-Loop 0, use BA= 1 instead
2
4 Ã nRC Repeat Sub-Loop 0, use BA= 2 instead
3
6 Ã nRC Repeat Sub-Loop 0, use BA= 3 instead
4
8 Ã nRC Repeat Sub-Loop 0, use BA= 4 instead
5
10 Ã nRC Repeat Sub-Loop 0, use BA= 5 instead
6
12 Ã nRC Repeat Sub-Loop 0, use BA= 6 instead
7
14 Ã nRC Repeat Sub-Loop 0, use BA= 7 instead
Notes: 1.
2.
3.
4.
DM must be driven low all the time. DQS, /DQS are MID-LEVEL.
DQ signals are MID-LEVEL.
BA: BA0 to BA2.
Am: m means Most Significant Bit (MSB) of Row address.
Data*2
Data Sheet E1729E30 (Ver. 3.0)
13
|
▷ |