DS87C520_1 Datasheet, PDF (32/42 Pages) Dallas Semiconductor – EPROM/ROM High-Speed Micro

POWER CYCLE TIMING CHARACTERISTICS
PARAMETER
SYMBOL MIN
TYP
Cycle Startup Time
t_CSU
1.8
Power-on Reset Delay
t_POR
DS87C520/DS83C520
MAX
65536
UNITS
ms
t_CLCL
NOTES
1
2
NOTES FOR POWER CYCLE TIMING CHARACTERISTICS:
1. Startup time for crystals varies with load capacitance and manufacturer. Time shown is for an 11.0592
MHz crystal manufactured by Fox.
2. Reset delay is a synchronous counter of crystal oscillations after crystal startup. Counting begins
when the level on the XTAL1 pin meets the V_IH2 criteria. Counting begins when the level on the
XTAL1 pin meets the V_IH2 criteria.At 33 MHz, this time is 1.99 ms.
EPROM PROGRAMMING AND VERIFICATION
(21°C to 27°C; V_CC =4.5V to 5.5V)
PARAMETER
SYMBOL MIN
TYP MAX UNITS NOTES
Programming Voltage
Programming Supply Current
Oscillator Frequency
Address Setup to PROG Low
Address Hold after PROG
Data Setup to PROG Low
Data Hold after PROG
Enable High to V_PP
V_PP Setup to PROG Low
V_PP Hold after PROG
PROG Width
Address to Data Valid
Enable Low to Data Valid
Data Float after Enable
PROG High to PROGLow
V_{P P}
I_PP
1/t_CLCL
t_AVGL
t_GHAX
t_DVGL
t_GHDX
t_EHSH
t_SHGL
t_SHGL
t_GLGH
t_AVQV
t_ELQV
t_EHQZ
t_GHGL
12.5
4
48t_CLCL
48 t_CLCL
48 t_CLCL
48 t_CLCL
48 t_CLCL
10
10
90
0
10
13.0
V
1
50
mA
6
MHz
µs
µs
110
µs
48 t_CLCL
48 t_CLCL
48 t_CLCL
µs
NOTE:
1. All voltages are referenced to ground.
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