DS87C520_1 Datasheet, PDF (13/42 Pages) Dallas Semiconductor – EPROM/ROM High-Speed Micro

DS87C520/DS83C520
Software is the only mechanism to invoke the PMM. Table 5 illustrates the instruction cycle rate in
PMM for several common crystal frequencies. Since power consumption is a direct function of operating
speed, PMM 1 eliminates most of the power consumption while still allowing a reasonable speed of
processing. PMM 2 runs very slow and provides the lowest power consumption without stopping the
CPU. This is illustrated in Table 6.
Note that PMM provides a lower power condition than Idle mode. This is because in Idle mode, all
clocked functions such as timers run at a rate of crystal divided by 4. Since wake-up from PMM is as fast
as or faster than from Idle and PMM allows the CPU to operate (even if doing NOPs), there is little
reason to use Idle mode in new designs.
MACHINE CYCLE RATE Table 5
CRYSTAL SPEED
FULL OPERATION
(4 CLOCKS)
11.0592 MHz
2.765 MHz
16 MHz
4.00 MHz
25 MHz
6.25 MHz
33 MHz
8.25 MHz
PMM1
(64 CLOCKS)
172.8 kHz
250.0 kHz
390.6 kHz
515.6 kHz
PMM2
(1024 CLOCKS)
10.8 kHz
15.6 kHz
24.4 kHz
32.2 kHz
TYPICAL OPERATING CURRENT IN PMM Table 6
CRYSTAL SPEED
FULL OPERATION
PMM1
(4 CLOCKS)
(64 CLOCKS)
11.0592 MHz
13.1 mA
5.3 mA
16 MHz
17.2 mA
6.4 mA
25 MHz
25.7 mA
8.1 mA
33 MHz
32.8 mA
9.8 mA
PMM2
(1024 CLOCKS)
4.8 mA
5.6 mA
7.0 mA
8.2 mA
CRYSTALESS PMM
A major component of power consumption in PMM is the crystal amplifier circuit. The
DS87C520/DS83C520 allows the user to switch CPU operation to an internal ring oscillator and turn off
the crystal amplifier. The CPU would then have a clock source of approximately 2-4 MHz, divided by
either 4, 64, or 1024. The ring is not accurate, so software can not perform precision timing. However,
this mode allows an additional saving of between 0.5 and 6.0 mA, depending on the actual crystal
frequency. While this saving is of little use when running at 4 clocks per instruction cycle, it makes a
major contribution when running in PMM1 or PMM2.
PMM OPERATION
Software invokes the PMM by setting the appropriate bits in the SFR area. The basic choices are divider
speed and clo ck source. There are three speeds (4, 64, and 1024) and two clock sources (crystal and ring).
Both the decisions and the controls are separate. Software will typically select the clock speed first. Then,
it will perform the switch to ring operation if desired. Lastly, software can disable the crystal amplifier if
desired.
There are two ways of exiting PMM. Software can remove the condition by reversing the procedure that
invoked PMM or hardware can (optionally) remove it. To resume operation at a divide by 4 rate under
software control, simply select 4 clocks per cycle, then crystal based operation if relevant. When
disabling the crystal as the time base in favor of the ring oscillator, there are timing restrictions associated
with restarting the crystal operation. Details are described below.
13 of 42