DS87C520_1 Datasheet, PDF (16/42 Pages) Dallas Semiconductor – EPROM/ROM High-Speed Micro

PMM CONTROL AND STATUS BIT SUMMARY Table 7
BIT NAME LOCATION
FUNCTION
RESET
XT/ RG
EXIF.3
Control. XT/ RG =1, runs from crystal or
X
RGMD
EXIF.2
external clock; XT/ RG =0, runs from internal
ring oscillator.
Status. RGMD=1, CPU clock = ring;
0
RGMD=0, CPU clock = crystal.
CD1, CD0
SWB
PMR.7,
PMR.6
PMR.5
Control. CD1,0=01, 4 clocks; CS1,0=10,
0,1
PMM1; CD1,0=11, PMM2.
Control. SWB=1, hardware invokes switch-
0
back to 4 clocks, SWB=0, no hardware
switchback.
XTOFF
PMR.3
Control. Disables crystal operation after ring
0
is selected.
PIP
STATUS.7
Status. 1 indicates a power-fail interrupt in
0
service.
HIP
STATUS.6
Status. 1 indicates high priority interrupt in
0
service.
LIP
STATUS.5
Status. 1 indicates low priority interrupt in
0
service.
XTUP
STATUS.4
Status. 1 indicates that the crystal has
1
stabilized.
SPTA1
STATUS.3
Status. Serial transmission on serial port 1.
0
SPRA1
STATUS.2
Status. Serial word reception on serial port 1.
0
SPTA0
STATUS.1
Status. Serial transmission on serial port 0.
0
SPRA0
STATUS.0
Status. Serial word reception on serial port 0.
0
DS87C520/DS83C520
WRITE ACCESS
0 to 1 only when
XTUP=1 and XTOFF=0
None
Write CD1,0=10 or 11
only from CD1,0=01
Unrestricted
1 only when XT/ RG =0
None
None
None
None
None
None
None
None
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