DS87C520_1 Datasheet, PDF (23/42 Pages) Dallas Semiconductor – EPROM/ROM High-Speed Micro

DS87C520/DS83C520
PROGRAMMING PROCEDURE
The DS87C520 should run from a clock speed between 4 and 6 MHz when being programmed. The
programming fixture should apply address information for each byte to the address lines and the data
value to the data lines. The control signals must be manipulated as shown in Table 10. The diagram in
Figure 5 shows the expected electrical connection for programming. Note that the programmer must
apply addresses in demultiplexed fashion to Ports 1 and 2 with data on Port 0. Waveforms and timing are
provided in the Electrical Specifications.
Program the DS87C520 as follows:
1. Apply the address value,
2. Apply the data value,
3. Select the programming option from Table 10 using the control signals,
4. Increase the voltage on V_PP from 5V to 12.75V if writing to the EPROM,
5. Pulse the PROG signal five times for EPROM array and 25 times for encryption table, lock bits, and
other EPROM bits,
6. Repeat as many times as necessary.
EPROM PROGRAMMING MODES Table 10
MODE
RST _{PSEN ALE/ PROG} EA/VPP P2.6 P2.7 P3.3 P3.6 P3.7
Program Code Data
H
L
PL
12.75V
L
H
H
H
H
Verify Code Data
H
L
H
H
L
L
L
H
H
Program Encryption Array H
L
Address 0-3Fh
PL
12.75V
L
H
H
L
H
Program Lock Bits LB1 H
L
PL
12.75V
H
H
H
H
H
LB2 H
L
PL
12.75V
H
H
H
L
L
LB3 H
L
PL
12.75V
H
L
H
H
L
Program Option Register
H
L
Address FCh
PL
12.75V
L
H
H
L
L
Read Signature or Option
H
L
H
Registers 30, 31, 60 FCh
H
L
L
L
L
L
DS87C520 EPROM LOCK BITS Table 11
LEVEL
LOCK BITS
PROTECTION
LB1
LB2
LB3
1
U
U
U
No program lock. Encrypted verify if encryption table was
programmed.
2
P
U
U
Prevent MOVC instructions in external memory from reading
program bytes in internal memory. EA is sampled and latched
on reset. Allow no further programming of EPROM.
3
P
P
U
Level 2 plus no verify operation. Also, prevent MOVX
instructions in external memory from reading SRAM (MOVX)
in internal memory.
4
P
P
P
Level 3 plus no external execution.
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