S6E2H Datasheet, PDF (96/163 Pages) Cypress Semiconductor – 32-bit ARM ® Cortex ® -M4F FM4 Microcontroller

S6E2H Series
NAND Flash Mode
Parameter
MNREX
Min pulse width
Data set up
→MNREX↑ time
MNREX↑→
Data hold time
MNALE↑→
MNWEX delay time
MNALE↓→
MNWEX delay time
MNCLE↑→
MNWEX delay time
MNWEX↑→
MNCLE delay time
MNWEX
Min pulse width
MNWEX↓→
Data output time
MNWEX↑→
Data hold time
Symbol
tNREW
tDS – NRE
tDH – NRE
tALEH - NWEL
tALEL - NWEL
tCLEH - NWEL
tNWEH - CLEL
tNWEW
tNWEL – DV
tNWEH – DX
Pin Name
MNREX
MNREX,
MADATA[15:0]
MNREX,
MADATA[15:0]
MNALE,
MNWEX
MNALE,
MNWEX
MNCLE,
MNWEX
MNCLE,
MNWEX
MNWEX
MNWEX,
MADATA[15:0]
MNWEX,
MADATA[15:0]
Conditions
VCC ≥ 4.5 V
VCC < 4.5 V
VCC ≥ 4.5 V
VCC < 4.5 V
VCC ≥ 4.5 V
VCC < 4.5 V
VCC ≥ 4.5 V
VCC < 4.5 V
VCC ≥ 4.5 V
VCC < 4.5 V
VCC ≥ 4.5 V
VCC < 4.5 V
VCC ≥ 4.5 V
VCC < 4.5 V
VCC ≥ 4.5 V
VCC < 4.5 V
VCC ≥ 4.5 V
VCC < 4.5 V
VCC ≥ 4.5 V
VCC < 4.5 V
Note:
− When the external load capacitance CL = 30 pF (m=0 to 15, n=1 to 16)
(VCC = 2.7V to 5.5V, VSS = 0V)
Value
Min
Max
Unit
MCLK×n-3
-
ns
20
38
-
-
ns
0
-
ns
MCLK×m-9 MCLK×m+9
MCLK×m-12 MCLK×m+12
ns
MCLK×m-9 MCLK×m+9
MCLK×m-12 MCLK×m+12
ns
MCLK×m-9 MCLK×m+9
MCLK×m-12 MCLK×m+12
ns
0
MCLK×m+9
MCLK×m+12
ns
MCLK×n-3
-
ns
-9
-12
+9
+12
ns
0
MCLK×m+9
MCLK×m+12
ns
NAND Flash Read
MCLK
MNREX
MADATA[15:0]
Read
Document Number: 001-98943 Rev *C
Page 96 of 163