S6E2H Datasheet, PDF (122/163 Pages) Cypress Semiconductor – 32-bit ARM ® Cortex ® -M4F FM4 Microcontroller

S6E2H Series
High-speed Synchronous Serial (SPI = 1, SCINV = 0)
Parameter
Symbol Pin Name Conditions
VCC < 4.5 V
Min
Max
Serial clock cycle time
tSCYC
SCKx
4tCYCP
-
SCK↑→SOT delay time
SIN→SCK↓
setup time
SCK↓→SIN hold time
SOT→SCK↓ delay time
tSHOVI
tIVSLI
tSLIXI
tSOVLI
SCKx,
SOTx
-10
+10
SCKx,
Internal shift
SINx clock operation
14
12.5*
-
SCKx,
SINx
5
-
SCKx,
SOTx
2tCYCP – 10
-
Serial clock L pulse width
tSLSH
SCKx
2tCYCP – 5
-
(VCC = 2.7V to 5.5V, VSS = 0V)
VCC ≥ 4.5 V
Min
Max
Unit
4tCYCP
-
ns
-10
+10 ns
12.5
-
ns
5
-
ns
2tCYCP – 10
-
ns
2tCYCP – 5
-
ns
Serial clock H pulse width tSHSL
SCKx
tCYCP + 10
-
tCYCP + 10
-
ns
SCK↑→SOT delay time
tSHOVE
SCKx,
SOTx
External shift
-
15
-
15
ns
SIN→SCK↓
setup time
tIVSLE
SCKx,
SINx
clock operation
5
-
5
-
ns
SCK↓→SIN hold time
tSLIXE
SCKx,
SINx
5
-
5
-
ns
SCK falling time
SCK rising time
tF
SCKx
tR
SCKx
-
5
-
5
ns
-
5
-
5
ns
Notes:
− The above characteristics apply to CLK synchronous mode.
− tCYCP indicates the APB bus clock cycle time.
About the APB bus number which multi-function serial is connected to, see 1. S6E2H Series Block Diagram in this data sheet.
− These characteristics only guarantee the following pins.
− No chip select:.................. SIN4_1, SOT4_1, SCK4_1
− Chip select: ......SIN6_1, SOT6_1, SCK6_1, SCS6_1
− When the external load capacitance CL = 30 pF. (For *, when CL = 10 pF)
Document Number: 001-98943 Rev *C
Page 122 of 163