S6E2H Datasheet, PDF (44/163 Pages) Cypress Semiconductor – 32-bit ARM ® Cortex ® -M4F FM4 Microcontroller

S6E2H Series
Pin
Function
CAN0
CAN1
Reset
Mode
Power
GND
Pin Name
TX0_0
TX0_1
TX0_2
RX0_0
RX0_1
RX0_2
TX1_0
TX1_1
TX1_2
RX1_0
RX1_1
RX1_2
INITX
MD1
MD0
VCC
VSS
Function Description
CAN interface ch.0 TX output pin
CAN interface ch.0 RX input pin
CAN interface ch.1 TX output pin
CAN interface ch.1 RX input pin
External Reset Input pin.
A reset is valid when INITX=L.
Mode 1 pin.
During serial programming to Flash
memory, MD1=L must be input.
Mode 0 pin.
During normal operation, MD0=L must be
input. During serial programming to Flash
memory, MD0=H must be input.
Power supply Pin
GND Pin
LQFP
120
51
18
114
52
19
113
84
12
63
85
11
62
Pin No
LQFP LQFP
100 80
-
-
13
-
94
74
-
-
14
-
93
73
-
-
-
-
53
42
-
-
-
-
52
41
38
33
23
56
46
36
57
47
37
1
1
1
31
26
-
46
41
31
61
51
-
91
76
61
117 97
77
107 92
-
30
25
20
45
40
30
60
50
40
90
75
60
120 100 80
FBGA
121
H6
F1
C3
H7
G1
B4
C9
G5
H10
B10
F6
J10
L3
L8
K9
B1
K1
K7
K11
A10
A4
A6
L1
L7
L11
A11
A1
-
-
-
K10
Clock
ADC
Power
VBAT
Power
ADC
GND
C pin
X0
X1
X0A
X1A
CROUT_0
CROUT_1
AVCC
AVRL
AVRH
VBAT
AVSS
C
Main clock (oscillation) input pin
Main clock (oscillation) I/O pin
Sub clock (oscillation) input pin
Sub clock (oscillation) I/O pin
Built-in high-speed CR-osc clock output
port
A/D converter and D/A converter
analog power supply pin
A/D converter analog reference voltage
input pin
A/D converter analog reference voltage
input pin
VBAT power supply pin.
Backup power supply (battery etc.) and
system power supply.
A/D converter and D/A converter
GND pin
Power supply stabilization capacity pin
58
48
38
L9
59
49
39
L10
39
34
24
L4
40
35
25
K4
87
72
58
C10
113 93
73
B4
70
60
49
J11
72
62
51
G11
73
63
52
F11
43
38
28
L5
71
61
50
H11
44
39
29
L6
Notes:
− While this device contains a Test Access Port (TAP) based on the IEEE 1149.1-2001 JTAG standard, it is not fully compliant to
all requirements of that standard. This device may contain a 32-bit device ID that is the same as the 32-bit device ID in other
devices with different functionality. The TAP pins may also be configurable for purposes other than access to the TAP
controller.
Document Number: 001-98943 Rev *C
Page 44 of 163