S6E2H Datasheet, PDF (141/163 Pages) Cypress Semiconductor – 32-bit ARM ® Cortex ® -M4F FM4 Microcontroller

S6E2H Series
13.4.15 SD Card Interface Timing
Default-Speed Mode
Clock CLK (All values are referred to VIH and VIL)
(VCC = 2.7V to 3.6V, VSS = 0V)
Parameter
Clock frequency Data Transfer
Mode
Symbol
fPP
Pin Name
S_CLK
Conditions
Value
Min
Max
0
16
Remarks
MHz
Clock frequency Identification
Mode
fOD
S_CLK
0*/100
400
CCARD ≤ 10 pF
kHz
Clock low time
tWL
S_CLK
(1 card)
10
-
ns
Clock high time
tWH
S_CLK
10
-
ns
Clock rising time
tTLH
S_CLK
-
10
ns
Clock falling time
tTHL
S_CLK
-
10
ns
*: 0 Hz means to stop the clock. The given minimum frequency range is for cases were continues clock is required.
Card Inputs CMD, DAT (referenced to Clock CLK)
Parameter
Symbol Pin Name
Input set-up time
Input hold time
tISU
S_CMD,
S_DATA3:0
tIH
S_CMD,
S_DATA3:0
Conditions
CCARD ≤ 10 pF
(1 card)
Card Outputs CMD, DAT (referenced to Clock CLK)
Parameter
Symbol Pin Name
Output Delay time during Data
Transfer Mode
Output Delay time during
Identification Mode
tODLY
tODLY
S_CMD,
S_DATA3:0
S_CMD,
S_DATA3:0
Conditions
CCARD ≤ 40 pF
(1 card)
Value
Min
Max
5
-
5
-
Value
Min
Max
0
22
0
50
Remarks
ns
ns
Remarks
ns
ns
Document Number: 001-98943 Rev *C
Page 141 of 163