CYRF69213_08 Datasheet, PDF (56/76 Pages) Cypress Semiconductor – Programmable Radio on Chip Low Power

CYRF69213
Table 82. Endpoint 0, 1, and 2 Count (EP0CNT–EP2CNT) [0x41, 0x43, 0x45] [R/W]
Bit #
7
6
5
4
3
2
1
0
Field
Data Toggle Data Valid
Reserved
Byte Count[3:0]
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Default
0
0
0
0
0
0
0
0
Bit 7
Data Toggle
This bit selects the DATA packet's toggle state. For IN transactions, firmware must set this bit to the select the trans-
mitted Data Toggle. For OUT or SETUP transactions, the hardware sets this bit to the state of the received Data Tog-
gle bit.
0 = DATA0
1 = DATA1
Bit 6
Data Valid
This bit is used for OUT and SETUP tokens only. This bit is cleared to ‘0’ if CRC, bitstuff, or PID errors have occurred.
This bit does not update for some endpoint mode settings
0 = Data is invalid. If enabled, the endpoint interrupt will occur even if invalid data is received
1 = Data is valid
Bits 5:4 Reserved
Bits 3:0 Byte Count Bit [3:0]
Byte Count Bits indicate the number of data bytes in a transaction: For IN transactions, firmware loads the count with the
number of bytes to be transmitted to the host from the endpoint FIFO. Valid values are 0 to 8 inclusive. For OUT or
SETUP transactions, the count is updated by hardware to the number of data bytes received, plus 2 for the CRC bytes.
Valid values are 2–10 inclusive.
For Endpoint 0 Count Register, whenever the count updates from a SETUP or OUT transaction, the count register locks and cannot
be written by the CPU. Reading the register unlocks it. This prevents firmware from overwriting a status update on it
Document #: 001-07552 Rev. *C
Page 56 of 76
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