CYRF69213_08 Datasheet, PDF (47/76 Pages) Cypress Semiconductor – Programmable Radio on Chip Low Power

CYRF69213
Table 66. Programmable Interval Timer Low (PITMRL) [0x26] [R]
Bit #
7
6
5
4
3
2
1
0
Field
Prog Interval Timer [7:0]
Read/Write
R
R
R
R
R
R
R
R
Default
0
0
0
0
0
0
0
0
Bits 7:0 ‘Prog Interval Timer [7:0]
This register holds the low-order byte of the 12-bit programmable interval timer. Reading this register causes the high-order byte to
be moved into a holding register allowing an automatic read of all 12 bits simultaneously
Table 67. Programmable Interval Timer High (PITMRH) [0x27] [R]
Bit #
7
6
5
4
3
2
1
0
Field
Reserved
Prog Interval Timer [11:8]
Read/Write
–
–
–
–
R
R
R
R
Default
0
0
0
0
0
0
0
0
Bits 7:4 Reserved
Bits 3:0 Prog Internal Timer [11:8]
This register holds the high-order nibble of the 12-bit programmable interval timer. Reading this register returns the high-order
nibble of the 12-bit timer at the instant that the low-order byte was last read
Table 68. Programmable Interval Reload Low (PIRL) [0x28] [R/W]
Bit #
7
6
5
4
3
2
1
0
Field
Prog Interval [7:0]
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Default
0
0
0
0
0
0
0
0
Bits 7:0 Prog Interval [7:0]
This register holds the lower 8 bits of the timer. While writing into the 12-bit reload register, write lower byte first then the higher
nibble
Table 69. Programmable Interval Reload High (PIRH) [0x29] [R/W]
Bit #
7
6
5
4
3
2
1
0
Field
Reserved
Prog Interval[11:8]
Read/Write
–
–
–
–
R/W
R/W
R/W
R/W
Default
0
0
0
0
0
0
0
0
Bits 7:4 Reserved
Bits 3:0 Prog Interval [11:8]
This register holds the higher 4 bits of the timer. While writing into the 12-bit reload register, write lower byte first then the higher
nibble
Document #: 001-07552 Rev. *C
Page 47 of 76
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