STC5415 Datasheet, PDF (8/48 Pages) Connor-Winfield Corporation – Line Card Clock

Register Map
STC5415
Line Card Clock
Data sheet
Table 2: Register Map
Addr
0x00
0x01
0x02
0x03
0x07
0x08
0x09
0x0A
0x0B
0x0C
0x0D
0x0E
0x0F
0x10
0x11
0x12
0x13
0x14
0x15
0x16
0x18
0x1A
0x1B
0x1C
0x1D
0x1E
0x20
0x21
0x22
0x23
0x24
0x25
0x26
0x27
0x28
0x2D
0x2E
0x2F
0x30
0x35
Reg Name
Chip_ID
Chip_Rev
Chip_Sub_Rev
Fill_Obs_Window
Leak_Obs_Window
Bucket_Size
Assert_Threshold
De_Assert_Threshold
Freerun_Cali
Disqualification_Range
Qualification_Range
Qualification_Soaking_Time
Ref_Index_Selector
Ref_Info
Ref_Activity
Ref_Qual
Interrupt_Event_Status
Interrupt_Event_Enable
Interrupt_Config
Hard-wired_Switch_Pre_Selections
SRCSW_States
Control_Mode
Loop_Bandwidth
Auto_Elect_Ref
Manual_Select_Ref
Active_Ref
Device_Holdover_History
Short_Term_Accu_History
Short_Term_History_Bandwidth
Bits
15-0
7-0
7-0
3-0
3-0
5-0
5-0
5-0
10-0
9-0
9-0
5-0
3-0
15-0
4-0
4-0
7-0
7-0
1-0
7-0
0-0
7-2
7-0
3-0
3-0
3-0
31-0
31-0
3-2
Type
R Chip ID = 0x5415
Description
R Chip revision number
R Chip sub-revision number
R/W Activity monitor: Leaky bucket fill observation window
R/W Activity monitor: Leaky bucket leak observation window
R/W Activity monitor: Leaky bucket size
R/W Activity monitor: Leaky bucket alarm assert threshold
R/W Activity monitor: Leaky bucket alarm de-assert threshold
R/W Freerun calibration, 2’s complement, -102.4 to +102.3ppm, step in
0.1ppm
R/W Reference disqualification range, 0 ~102.3ppm. The value is also
specified as pull-in range
R/W Reference qualification range, 0 ~102.3ppm.
R/W Reference qualification soaking time, 0 ~63s
R/W Determines which reference data is shown in register Ref_Info.
Determines which of reference input is selected for manually
acceptable reference input frequency
R Frequency offset and frequency info of the reference selected by
register Ref_Index_Selector
R Reference activity for reference 1,2,3,4,5
R Qualification status for reference 1,2,3,4,5
R/W Interrupt events
R/W Selects which of interrupt events will assert pin EVENT_INTR
R/W Pin EVENT_INTR configuration and idle mode
R/W Pre-selected reference number 1 and reference number 2 for hard-
wired manual switch mode
R Indicates the states of pin SRCSW
R/W Holdover history usage, Revertive, Manual/Auto, OOP, SRCSW
R/W Loop bandwidth selection
R Indicates the reference elected by auto reference elector
R The reference specified by users for manual selection mode
R Indicates the PLL current selected reference
R Device Holdover History
R Short term Accumulated History
R/W Control short term history accumulation bandwidth
Preliminary
Page 8 of 48 TM120
Rev:P1.3
© Copyright the Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice
Date: September 20, 2011