STC5415 Datasheet, PDF (23/48 Pages) Connor-Winfield Corporation – Line Card Clock

Processor Interface Descriptions
The STC5415 supports SPI bus interface:
STC5415
Line Card Clock
Data sheet
The SPI interface bus mode uses the CS, SCLK,SDI, SDO pins, with timing as shown in Figure 8, Figure 9 and
Figure 10. For read operation, serial data output can be read out from the STC5415 on either the rising or fall-
ing edge of the SCLK. The edge selection depends on pin CLKE logic level.
Serial Bus Timing
CS
t_CS
t_CSHLD
t_CSMIN
t_CSTRI
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16
SCLK
t_Ds
t_Dh
t_CH
t_CL
SDI
SDO
1 A0 A1 A2 A3 A4 A5 A6
MSB
LSB
t_DRDY
t_DHLD
D0 D1 D2 D3 D4 D5 D6 ^D7
MSB
LSB
Figure 8:SPI Bus, Read access (Pin CLKE = Low)
CS
t_CS
1
2
3
4
5
6
7
8
9
t_CSHLD
t_CSMIN
10 11 12 13 14 15 16
t_CSTRI
SCLK
t_Ds
t_Dh
t_CH
t_CL
SDI
SDO
1 A0 A1 A2 A3 A4 A5 ^A6
MSB
LSB
t_DRDY
t_DHLD
D0 D1 D2 D3 D4 D5 D6 D7
MSB
LSB
Figure 9: SPI Bus Timing, Read access (Pin CLKE = High)
Preliminary
Page 23 of 48 TM120
Rev:P1.3
© Copyright the Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice
Date: September 20, 2011