STC5415 Datasheet, PDF (31/48 Pages) Connor-Winfield Corporation – Line Card Clock

STC5415
Line Card Clock
Data sheet
SRCSW_States, 0x1E (R/W)
Address
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
0x1E
Not used
Pin states
Indicates states of pin SRCSW.
0 = Low; 1 = High
Default value: 0
Control_Mode, 0x20 (R/W)
Address
0x20
Bit7
Hard-wired _Switch
Bit6
Not used
Bit5
SAP
Bit4
Ref_Sel_Mode
Bit3
Revertive
Bit2
Bit1 Bit0
Not used
Mode control bits for individual timing generator.
Revertive
Selects the revertive mode or non-revertive mode of the auto selector.
0 = Non-revertive; 1 = Revertive
Ref_Sel_Mode
Determines reference selection mode.
0 = Manual; 1 = Auto
This bit may be overrided by bit7 of this register.
SAP
In manual mode, when the selected reference is out of the pull-in range, as specified in register
Disqualification_Range. SAP determine whether clock output will follow the reference input
0 = Follow, 1 = Stop following at pull-in range boundary
Hard-wired_Switch
0 = Not Hard-wired Switch, selects reference in manual selection mode or auto selection mode;
1 = Hard-wired Switch, selects reference in hard-wired manual selection mode by using control pin
SRCSW to hard-wired manual switch between two pre-selected reference inputs.
See register Hard-wired_Switch_Pre_Selection.
Default value: 0
Loop_Bandwidth, 0x21 (R/W)
Address
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
0x21
Bandwidth select
Sets each timing generator’s loop bandwidth:
Field Value
0
Bandwidth, Hz
103
Preliminary
Page 31 of 48 TM120
Rev:P1.3
© Copyright the Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice
Date: September 20, 2011