CMX994 Datasheet, PDF (58/61 Pages) CML Microcircuits – Local Oscillator

Direct Conversion Receivers
AC Parameters – Tx Output
Tx Divider
Input Frequency Range
Output Frequency Range
Divider Ratio
Output Level
Noise Floor
CMX994/CMX994A/CMX994E
Notes
38
39
Min.
Typ.
Max.
100
–
2000
100
–
1000
–
1, 2, 4 or 6
–
-5.5
-3.5
-1.5
–
-146
–
Units
MHz
MHz
dBm
dBc/Hz
Notes:
38. 448MHz output with LO divider ratio = 2; see section 0 for further information.
39. Noise at 5MHz offset, measured at 500MHz with 1GHz Local Oscillator.
AC Parameters – Integer N PLL / VCO and LO input
Notes Min.
Typ.
Max.
Phase Locked Loop
Reference Input
Frequency
Level
Divide Ratios (R Counter)
Synthesiser
Comparison Frequency (f_comparison)
Input Frequency Range
Input Level
Divide Ratios (M Counter)
Charge Pump Current
1Hz Normalised Phase Noise Floor
VCO Negative Resistance Amplifier
Frequency Range
Phase Noise at 10kHz Offset
Phase Noise at 100kHz Offset
VCO Buffer
Frequency Range
LO Input
Input Level
Frequency Range
5
40
0.5
2
–
30
–
–
–
32767
–
–
500
200
–
1100
-10
-4
–
2
–
262143
–
2.5
–
43
–
-216
–
42
200
–
1100
41
–
-96
–
41
–
-116
–
200
–
1100
44
-15
100
-10
-5
–
2000
Unit
MHz
Vp-p
kHz
MHz
dBm
mA
dBc/Hz
MHz
dBc/Hz
dBc/Hz
MHz
dBm
MHz
Notes:
40. Sinewave or clipped sinewave.
41. With external components forming an 750MHz VCO and its LO divider value set to 4.
42. Operation will depend on the choice and layout of external resonant components.
43. 1Hz Normalised Phase Noise Floor (PN1Hz) can be used to calculate the phase noise within the PLL
loop bandwidth by: Measured Phase Noise (in 1Hz) = -PN1Hz - 20log₁₀(M) - 10log₁₀(f_comparison)
44. Single-ended input as described in section 5.3.1.
 2015 CML Microsystems Plc
Page 58 of 70
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